UefiCpuPkg/Include/Library: Add Register CPU Features Library

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / CpuS3.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 12efc1f90eee61b65a4f5e00439d95ccd77d0580..c3280b88793290a7b28c72dd53ae09f532d9a9a3 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -826,21 +826,25 @@ CopyRegisterTable (
 \r
   CopyMem (DestinationRegisterTableList, SourceRegisterTableList, NumberOfCpus * sizeof (CPU_REGISTER_TABLE));\r
   for (Index = 0; Index < NumberOfCpus; Index++) {\r
-    RegisterTableEntry = AllocatePool (DestinationRegisterTableList[Index].AllocatedSize);\r
-    ASSERT (RegisterTableEntry != NULL);\r
-    CopyMem (RegisterTableEntry, (VOID *)(UINTN)SourceRegisterTableList[Index].RegisterTableEntry, DestinationRegisterTableList[Index].AllocatedSize);\r
-    //\r
-    // Go though all MSRs in register table to initialize MSR spin lock\r
-    //\r
-    for (Index1 = 0; Index1 < DestinationRegisterTableList[Index].TableLength; Index1++, RegisterTableEntry++) {\r
-      if ((RegisterTableEntry->RegisterType == Msr) && (RegisterTableEntry->ValidBitLength < 64)) {\r
-        //\r
-        // Initialize MSR spin lock only for those MSRs need bit field writing\r
-        //\r
-        InitMsrSpinLockByIndex (RegisterTableEntry->Index);\r
+    if (DestinationRegisterTableList[Index].AllocatedSize != 0) {\r
+      RegisterTableEntry = AllocateCopyPool (\r
+        DestinationRegisterTableList[Index].AllocatedSize,\r
+        (VOID *)(UINTN)SourceRegisterTableList[Index].RegisterTableEntry\r
+        );\r
+      ASSERT (RegisterTableEntry != NULL);\r
+      DestinationRegisterTableList[Index].RegisterTableEntry = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTableEntry;\r
+      //\r
+      // Go though all MSRs in register table to initialize MSR spin lock\r
+      //\r
+      for (Index1 = 0; Index1 < DestinationRegisterTableList[Index].TableLength; Index1++, RegisterTableEntry++) {\r
+        if ((RegisterTableEntry->RegisterType == Msr) && (RegisterTableEntry->ValidBitLength < 64)) {\r
+          //\r
+          // Initialize MSR spin lock only for those MSRs need bit field writing\r
+          //\r
+          InitMsrSpinLockByIndex (RegisterTableEntry->Index);\r
+        }\r
       }\r
     }\r
-    DestinationRegisterTableList[Index].RegisterTableEntry = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTableEntry;\r
   }\r
 }\r
 \r