UefiCpuPkg/PiSmmCpuDxeSmm: update comments in IA32 SmmStartup()

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / SmmInit.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
index e96dd8d2392aea0d321100d455c829a8c98b182b..08534dba64b71cc11065638f5d3af7bd67b9710f 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
@@ -47,12 +47,12 @@ ASM_PFX(SmmStartup):
     cpuid\r
     DB      0x66\r
     mov     ebx, edx                    ; rdmsr will change edx. keep it in ebx.\r
-    DB      0x66, 0xb8\r
+    DB      0x66, 0xb8                  ; mov eax, imm32\r
 ASM_PFX(gSmmCr3): DD 0\r
     mov     cr3, eax\r
     DB      0x67, 0x66\r
     lgdt    [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
-    DB      0x66, 0xb8\r
+    DB      0x66, 0xb8                  ; mov eax, imm32\r
 ASM_PFX(gSmmCr4): DD 0\r
     mov     cr4, eax\r
     DB      0x66\r
@@ -64,11 +64,11 @@ ASM_PFX(gSmmCr4): DD 0
     or      ah, BIT3                    ; set NXE bit\r
     wrmsr\r
 .1:\r
-    DB      0x66, 0xb8\r
+    DB      0x66, 0xb8                  ; mov eax, imm32\r
 ASM_PFX(gSmmCr0): DD 0\r
     DB      0xbf, PROTECT_MODE_DS, 0    ; mov di, PROTECT_MODE_DS\r
     mov     cr0, eax\r
-    DB      0x66, 0xea                   ; jmp far [ptr48]\r
+    DB      0x66, 0xea                  ; jmp far [ptr48]\r
 ASM_PFX(gSmmJmpAddr):\r
     DD      @32bit\r
     DW      PROTECT_MODE_CS\r