MdePkg: Add definition for new warning code EFI_WARN_FILE_SYSTEM.

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / PiSmmCpuDxeSmm.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index 2489848c794f807d3a137271a0eeaf38d145ff89..36a0650b2fd06c1b1dc521cd11bf134f8d79cc34 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -760,6 +760,9 @@ PiCpuSmmEntry (
   UINTN                      NumberOfEnabledProcessors;\r
   UINTN                      Index;\r
   VOID                       *Buffer;\r
+  UINTN                      BufferPages;\r
+  UINTN                      TileCodeSize;\r
+  UINTN                      TileDataSize;\r
   UINTN                      TileSize;\r
   VOID                       *GuidHob;\r
   EFI_SMRAM_DESCRIPTOR       *SmramDescriptor;\r
@@ -910,13 +913,18 @@ PiCpuSmmEntry (
   //\r
   // Retrieve CPU Family\r
   //\r
-  AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, &RegEdx);\r
+  AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, NULL);\r
   FamilyId = (RegEax >> 8) & 0xf;\r
   ModelId = (RegEax >> 4) & 0xf;\r
   if (FamilyId == 0x06 || FamilyId == 0x0f) {\r
     ModelId = ModelId | ((RegEax >> 12) & 0xf0);\r
   }\r
 \r
+  RegEdx = 0;\r
+  AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);\r
+  if (RegEax >= CPUID_EXTENDED_CPU_SIG) {\r
+    AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &RegEdx);\r
+  }\r
   //\r
   // Determine the mode of the CPU at the time an SMI occurs\r
   //   Intel(R) 64 and IA-32 Architectures Software Developer's Manual\r
@@ -937,9 +945,13 @@ PiCpuSmmEntry (
   // specific context in a PROCESSOR_SMM_DESCRIPTOR, and the SMI entry point.  This size\r
   // is rounded up to nearest power of 2.\r
   //\r
-  TileSize = sizeof (SMRAM_SAVE_STATE_MAP) + sizeof (PROCESSOR_SMM_DESCRIPTOR) + GetSmiHandlerSize () - 1;\r
+  TileCodeSize = GetSmiHandlerSize ();\r
+  TileCodeSize = ALIGN_VALUE(TileCodeSize, SIZE_4KB);\r
+  TileDataSize = sizeof (SMRAM_SAVE_STATE_MAP) + sizeof (PROCESSOR_SMM_DESCRIPTOR);\r
+  TileDataSize = ALIGN_VALUE(TileDataSize, SIZE_4KB);\r
+  TileSize = TileDataSize + TileCodeSize - 1;\r
   TileSize = 2 * GetPowerOfTwo32 ((UINT32)TileSize);\r
-  DEBUG ((EFI_D_INFO, "SMRAM TileSize = %08x\n", TileSize));\r
+  DEBUG ((EFI_D_INFO, "SMRAM TileSize = 0x%08x (0x%08x, 0x%08x)\n", TileSize, TileCodeSize, TileDataSize));\r
 \r
   //\r
   // If the TileSize is larger than space available for the SMI Handler of CPU[i],\r
@@ -961,12 +973,14 @@ PiCpuSmmEntry (
   // Intel486 processors: FamilyId is 4\r
   // Pentium processors : FamilyId is 5\r
   //\r
+  BufferPages = EFI_SIZE_TO_PAGES (SIZE_32KB + TileSize * (mMaxNumberOfCpus - 1));\r
   if ((FamilyId == 4) || (FamilyId == 5)) {\r
-    Buffer = AllocateAlignedPages (EFI_SIZE_TO_PAGES (SIZE_32KB + TileSize * (mMaxNumberOfCpus - 1)), SIZE_32KB);\r
+    Buffer = AllocateAlignedPages (BufferPages, SIZE_32KB);\r
   } else {\r
-    Buffer = AllocatePages (EFI_SIZE_TO_PAGES (SIZE_32KB + TileSize * (mMaxNumberOfCpus - 1)));\r
+    Buffer = AllocateAlignedPages (BufferPages, SIZE_4KB);\r
   }\r
   ASSERT (Buffer != NULL);\r
+  DEBUG ((EFI_D_INFO, "SMRAM SaveState Buffer (0x%08x, 0x%08x)\n", Buffer, EFI_PAGES_TO_SIZE(BufferPages)));\r
 \r
   //\r
   // Allocate buffer for pointers to array in  SMM_CPU_PRIVATE_DATA.\r
@@ -1406,6 +1420,35 @@ ConfigSmmCodeAccessCheck (
   }\r
 }\r
 \r
+/**\r
+  This API provides a way to allocate memory for page table.\r
+\r
+  This API can be called more once to allocate memory for page tables.\r
+\r
+  Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the\r
+  allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If Pages is 0, then NULL\r
+  is returned.  If there is not enough memory remaining to satisfy the request, then NULL is\r
+  returned.\r
+\r
+  @param  Pages                 The number of 4 KB pages to allocate.\r
+\r
+  @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+AllocatePageTableMemory (\r
+  IN UINTN           Pages\r
+  )\r
+{\r
+  VOID  *Buffer;\r
+\r
+  Buffer = SmmCpuFeaturesAllocatePageTableMemory (Pages);\r
+  if (Buffer != NULL) {\r
+    return Buffer;\r
+  }\r
+  return AllocatePages (Pages);\r
+}\r
+\r
 /**\r
   Perform the remaining tasks.\r
 \r
@@ -1431,6 +1474,8 @@ PerformRemainingTasks (
     //\r
     ConfigSmmCodeAccessCheck ();\r
 \r
+    SmmCpuFeaturesCompleteSmmReadyToLock ();\r
+\r
     //\r
     // Clean SMM ready to lock flag\r
     //\r
@@ -1451,11 +1496,22 @@ PerformPreTasks (
   // Restore SMM Configuration in S3 boot path.\r
   //\r
   if (mRestoreSmmConfigurationInS3) {\r
+    //\r
+    // Need make sure gSmst is correct because below function may use them.\r
+    //\r
+    gSmst->SmmStartupThisAp      = gSmmCpuPrivate->SmmCoreEntryContext.SmmStartupThisAp;\r
+    gSmst->CurrentlyExecutingCpu = gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu;\r
+    gSmst->NumberOfCpus          = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;\r
+    gSmst->CpuSaveStateSize      = gSmmCpuPrivate->SmmCoreEntryContext.CpuSaveStateSize;\r
+    gSmst->CpuSaveState          = gSmmCpuPrivate->SmmCoreEntryContext.CpuSaveState;\r
+\r
     //\r
     // Configure SMM Code Access Check feature if available.\r
     //\r
     ConfigSmmCodeAccessCheck ();\r
 \r
+    SmmCpuFeaturesCompleteSmmReadyToLock ();\r
+\r
     mRestoreSmmConfigurationInS3 = FALSE;\r
   }\r
 }\r