SmmWriteSaveState\r
};\r
\r
+///\r
+/// SMM Memory Attribute Protocol instance\r
+///\r
+EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL mSmmMemoryAttribute = {\r
+ EdkiiSmmGetMemoryAttributes,\r
+ EdkiiSmmSetMemoryAttributes,\r
+ EdkiiSmmClearMemoryAttributes\r
+};\r
+\r
EFI_CPU_INTERRUPT_HANDLER mExternalVectorTable[EXCEPTION_VECTOR_NUMBER];\r
\r
//\r
EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;\r
UINTN mSmmCpuSmramRangeCount;\r
\r
+UINT8 mPhysicalAddressBits;\r
+\r
/**\r
Initialize IDT to setup exception handlers for SMM.\r
\r
//\r
// Find Image Base\r
//\r
- Pe32Data = PeCoffSerachImageBase (CallerIpAddress);\r
+ Pe32Data = PeCoffSearchImageBase (CallerIpAddress);\r
if (Pe32Data != 0) {\r
DEBUG ((DEBUG_ERROR, "It is invoked from the instruction before IP(0x%p)", (VOID *) CallerIpAddress));\r
PdbPointer = PeCoffLoaderGetPdbPointer ((VOID *) Pe32Data);\r
);\r
ASSERT_EFI_ERROR (Status);\r
\r
+ //\r
+ // Install the SMM Memory Attribute Protocol into SMM protocol database\r
+ //\r
+ Status = gSmst->SmmInstallProtocolInterface (\r
+ &mSmmCpuHandle,\r
+ &gEdkiiSmmMemoryAttributeProtocolGuid,\r
+ EFI_NATIVE_INTERFACE,\r
+ &mSmmMemoryAttribute\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
//\r
// Expose address of CPU Hot Plug Data structure if CPU hot plug is supported.\r
//\r
//\r
for (Index = 0; Index < gSmst->NumberOfCpus; Index++) {\r
if (Index != gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu) {\r
-\r
+ if (gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId == INVALID_APIC_ID) {\r
+ //\r
+ // If this processor does not exist\r
+ //\r
+ continue;\r
+ }\r
//\r
// Acquire Config SMM Code Access Check spin lock. The AP will release the\r
// spin lock when it is done executing ConfigSmmCodeAccessCheckOnCurrentProcessor().\r