volatile BOOLEAN *CandidateBsp;\r
} SMM_DISPATCHER_MP_SYNC_DATA;\r
\r
+#define MSR_SPIN_LOCK_INIT_NUM 15\r
+\r
typedef struct {\r
- SPIN_LOCK SpinLock;\r
+ SPIN_LOCK *SpinLock;\r
UINT32 MsrIndex;\r
} MP_MSR_LOCK;\r
\r
volatile BOOLEAN *AllCpusInSync;\r
SPIN_LOCK *PFLock;\r
SPIN_LOCK *CodeAccessCheckLock;\r
+ SPIN_LOCK *MemoryMappedLock;\r
} SMM_CPU_SEMAPHORE_GLOBAL;\r
\r
///\r
volatile BOOLEAN *Present;\r
} SMM_CPU_SEMAPHORE_CPU;\r
\r
+///\r
+/// All MSRs semaphores' pointer and counter\r
+///\r
+typedef struct {\r
+ SPIN_LOCK *Msr;\r
+ UINTN AvailableCounter;\r
+} SMM_CPU_SEMAPHORE_MSR;\r
\r
///\r
/// All semaphores' information\r
typedef struct {\r
SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;\r
SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;\r
+ SMM_CPU_SEMAPHORE_MSR SemaphoreMsr;\r
} SMM_CPU_SEMAPHORES;\r
\r
extern IA32_DESCRIPTOR gcSmiGdtr;\r
extern UINTN mSmmStackSize;\r
extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;\r
extern IA32_DESCRIPTOR gcSmiInitGdtr;\r
+extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;\r
+extern UINTN mSemaphoreSize;\r
extern SPIN_LOCK *mPFLock;\r
extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;\r
+extern SPIN_LOCK *mMemoryMappedLock;\r
\r
/**\r
Create 4G PageTable in SMRAM.\r