MdeModulePkg/PiSmmCore: Cache CommunicationBuffer info before using it

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / SmmProfile.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
index 8ecc5415a341fe90b9a49b2dab10805283a5763d..c1a48d100e0fa42cf42bd0921789150f866f69e1 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
@@ -29,11 +29,6 @@ UINTN                     mSmmProfileSize;
 //\r
 UINTN                     mMsrDsAreaSize   = SMM_PROFILE_DTS_SIZE;\r
 \r
-//\r
-// The flag indicates if execute-disable is supported by processor.\r
-//\r
-BOOLEAN                   mXdSupported     = FALSE;\r
-\r
 //\r
 // The flag indicates if execute-disable is enabled on processor.\r
 //\r
@@ -42,7 +37,7 @@ BOOLEAN                   mXdEnabled       = FALSE;
 //\r
 // The flag indicates if BTS is supported by processor.\r
 //\r
-BOOLEAN                   mBtsSupported     = FALSE;\r
+BOOLEAN                   mBtsSupported     = TRUE;\r
 \r
 //\r
 // The flag indicates if SMM profile starts to record data.\r
@@ -529,6 +524,12 @@ InitPaging (
         //\r
         continue;\r
       }\r
+      if ((*Pde & IA32_PG_PS) != 0) {\r
+        //\r
+        // This is 1G entry, skip it\r
+        //\r
+        continue;\r
+      }\r
       Pte = (UINT64 *)(UINTN)(*Pde & PHYSICAL_ADDRESS_MASK);\r
       if (Pte == 0) {\r
         continue;\r
@@ -587,6 +588,15 @@ InitPaging (
         //\r
         continue;\r
       }\r
+      if ((*Pde & IA32_PG_PS) != 0) {\r
+        //\r
+        // This is 1G entry, set NX bit and skip it\r
+        //\r
+        if (mXdSupported) {\r
+          *Pde = *Pde | IA32_PG_NX;\r
+        }\r
+        continue;\r
+      }\r
       Pte = (UINT64 *)(UINTN)(*Pde & PHYSICAL_ADDRESS_MASK);\r
       if (Pte == 0) {\r
         continue;\r
@@ -925,17 +935,15 @@ InitSmmProfileInternal (
 /**\r
   Check if XD feature is supported by a processor.\r
 \r
-  @param[in,out] Buffer  The pointer to private data buffer.\r
-\r
 **/\r
 VOID\r
-EFIAPI\r
 CheckFeatureSupported (\r
-  IN OUT VOID   *Buffer\r
+  VOID\r
   )\r
 {\r
-  UINT32                 RegEax;\r
-  UINT32                 RegEdx;\r
+  UINT32                         RegEax;\r
+  UINT32                         RegEdx;\r
+  MSR_IA32_MISC_ENABLE_REGISTER  MiscEnableMsr;\r
 \r
   if (mXdSupported) {\r
     AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);\r
@@ -966,9 +974,10 @@ CheckFeatureSupported (
       //    BTINT bits in the MSR_DEBUGCTLA MSR.\r
       // 2. The IA32_DS_AREA MSR can be programmed to point to the DS save area.\r
       //\r
-      if (AsmMsrBitFieldRead64 (MSR_IA32_MISC_ENABLE, 11, 11) == 1) {\r
+      MiscEnableMsr.Uint64 = AsmReadMsr64 (MSR_IA32_MISC_ENABLE);\r
+      if (MiscEnableMsr.Bits.BTS == 1) {\r
         //\r
-        // BTS facilities is not supported if MSR_IA32_MISC_ENABLE BIT11 is set.\r
+        // BTS facilities is not supported if MSR_IA32_MISC_ENABLE.BTS bit is set.\r
         //\r
         mBtsSupported = FALSE;\r
       }\r
@@ -976,67 +985,6 @@ CheckFeatureSupported (
   }\r
 }\r
 \r
-/**\r
-  Check if XD and BTS features are supported by all processors.\r
-\r
-**/\r
-VOID\r
-CheckProcessorFeature (\r
-  VOID\r
-  )\r
-{\r
-  EFI_STATUS                        Status;\r
-  EFI_MP_SERVICES_PROTOCOL          *MpServices;\r
-\r
-  Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, (VOID **)&MpServices);\r
-  ASSERT_EFI_ERROR (Status);\r
-\r
-  //\r
-  // First detect if XD and BTS are supported\r
-  //\r
-  mXdSupported  = TRUE;\r
-  mBtsSupported = TRUE;\r
-\r
-  //\r
-  // Check if XD and BTS are supported on all processors.\r
-  //\r
-  CheckFeatureSupported (NULL);\r
-\r
-  //\r
-  //Check on other processors if BSP supports this\r
-  //\r
-  if (mXdSupported || mBtsSupported) {\r
-    MpServices->StartupAllAPs (\r
-                  MpServices,\r
-                  CheckFeatureSupported,\r
-                  TRUE,\r
-                  NULL,\r
-                  0,\r
-                  NULL,\r
-                  NULL\r
-                  );\r
-  }\r
-}\r
-\r
-/**\r
-  Enable XD feature.\r
-\r
-**/\r
-VOID\r
-ActivateXd (\r
-  VOID\r
-  )\r
-{\r
-  UINT64           MsrRegisters;\r
-\r
-  MsrRegisters = AsmReadMsr64 (MSR_EFER);\r
-  if ((MsrRegisters & MSR_EFER_XD) != 0) {\r
-    return ;\r
-  }\r
-  MsrRegisters |= MSR_EFER_XD;\r
-  AsmWriteMsr64 (MSR_EFER, MsrRegisters);\r
-}\r
-\r
 /**\r
   Enable single step.\r
 \r
@@ -1427,5 +1375,8 @@ InitIdtr (
   VOID\r
   )\r
 {\r
-  SmmRegisterExceptionHandler (&mSmmCpuService, EXCEPT_IA32_DEBUG, DebugExceptionHandler);\r
+  EFI_STATUS                        Status;\r
+\r
+  Status = SmmRegisterExceptionHandler (&mSmmCpuService, EXCEPT_IA32_DEBUG, DebugExceptionHandler);\r
+  ASSERT_EFI_ERROR (Status);\r
 }\r