/** @file\r
SMM profile header file.\r
\r
-Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
\r
/**\r
- Check if XD feature is supported by a processor.\r
+ Check if feature is supported by a processor.\r
\r
**/\r
VOID\r
);\r
\r
/**\r
- Enable XD feature.\r
+ Update page table according to protected memory ranges and the 4KB-page mapped memory ranges.\r
\r
**/\r
VOID\r
-ActivateXd (\r
+InitPaging (\r
VOID\r
);\r
\r
/**\r
- Update page table according to protected memory ranges and the 4KB-page mapped memory ranges.\r
+ Get CPU Index from APIC ID.\r
\r
**/\r
-VOID\r
-InitPaging (\r
+UINTN\r
+GetCpuIndex (\r
VOID\r
);\r
\r
+/**\r
+ Handler for Page Fault triggered by Guard page.\r
+\r
+ @param ErrorCode The Error code of exception.\r
+\r
+**/\r
+VOID\r
+GuardPagePFHandler (\r
+ UINTN ErrorCode\r
+ );\r
+\r
+//\r
+// The flag indicates if execute-disable is supported by processor.\r
+//\r
extern BOOLEAN mXdSupported;\r
+//\r
+// The flag indicates if execute-disable is enabled on processor.\r
+//\r
extern BOOLEAN mXdEnabled;\r
+//\r
+// The flag indicates if #DB will be setup in #PF handler.\r
+//\r
+extern BOOLEAN mSetupDebugTrap;\r
\r
#endif // _SMM_PROFILE_H_\r