UefiCpuPkg/PiSmmCpuDxeSmm: Using global semaphores in aligned buffer

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / PageTbl.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 5b11e5eb48a836a19c47512db0af4ddf6696a244..9cee784156eb0338e647d62464591e6319bd6110 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -1,7 +1,7 @@
 /** @file\r
 Page Fault (#PF) handler for X64 processors\r
 \r
-Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -17,7 +17,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define PAGE_TABLE_PAGES            8\r
 #define ACC_MAX_BIT                 BIT3\r
 LIST_ENTRY                          mPagePool = INITIALIZE_LIST_HEAD_VARIABLE (mPagePool);\r
-SPIN_LOCK                           mPFLock;\r
 BOOLEAN                             m1GPageTableSupport = FALSE;\r
 \r
 /**\r
@@ -107,7 +106,7 @@ SmmInitPageTable (
   //\r
   // Initialize spin lock\r
   //\r
-  InitializeSpinLock (&mPFLock);\r
+  InitializeSpinLock (mPFLock);\r
 \r
   m1GPageTableSupport = Is1GPageSupport ();\r
   //\r
@@ -651,7 +650,7 @@ SmiPFHandler (
 \r
   ASSERT (InterruptType == EXCEPT_IA32_PAGE_FAULT);\r
 \r
-  AcquireSpinLock (&mPFLock);\r
+  AcquireSpinLock (mPFLock);\r
 \r
   PFAddress = AsmReadCr2 ();\r
 \r
@@ -688,5 +687,5 @@ SmiPFHandler (
     SmiDefaultPFHandler ();\r
   }\r
 \r
-  ReleaseSpinLock (&mPFLock);\r
+  ReleaseSpinLock (mPFLock);\r
 }\r