UefiCpuPkg/PiSmmCpuDxeSmm: Decrease mNumberToFinish in AP safe code

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / SmmProfileArch.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c
index c4ec12debb1c444555564dde20b63ab077afa54b..065fb2c24c7dcf02322b900e123518776a8caaa0 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c
@@ -45,13 +45,13 @@ InitSmmS3Cr3 (
   //\r
   // Generate PAE page table for the first 4GB memory space\r
   //\r
-  Pages = Gen4GPageTable (1);\r
+  Pages = Gen4GPageTable (1, FALSE);\r
 \r
   //\r
   // Fill Page-Table-Level4 (PML4) entry\r
   //\r
   PTEntry = (UINT64*)(UINTN)(Pages - EFI_PAGES_TO_SIZE (1));\r
-  *PTEntry = Pages + IA32_PG_P;\r
+  *PTEntry = Pages | PAGE_ATTRIBUTE_BITS;\r
   ZeroMem (PTEntry + 1, EFI_PAGE_SIZE - sizeof (*PTEntry));\r
 \r
   //\r
@@ -78,7 +78,7 @@ InitPagesForPFHandler (
   //\r
   Address = NULL;\r
   Address = AllocatePages (MAX_PF_PAGE_COUNT);\r
-  ASSERT_EFI_ERROR (Address != NULL);\r
+  ASSERT (Address != NULL);\r
 \r
   mPFPageBuffer =  (UINT64)(UINTN) Address;\r
   mPFPageIndex = 0;\r
@@ -117,7 +117,7 @@ AcquirePage (
   //\r
   // Link & Record the current uplink\r
   //\r
-  *Uplink = Address | IA32_PG_P | IA32_PG_RW;\r
+  *Uplink = Address | PAGE_ATTRIBUTE_BITS;\r
   mPFPageUplink[mPFPageIndex] = Uplink;\r
 \r
   mPFPageIndex = (mPFPageIndex + 1) % MAX_PF_PAGE_COUNT;\r
@@ -242,9 +242,9 @@ RestorePageTableAbove4G (
       // PTE\r
       PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & PHYSICAL_ADDRESS_MASK);\r
       for (Index = 0; Index < 512; Index++) {\r
-        PageTable[Index] = Address | IA32_PG_RW | IA32_PG_P;\r
+        PageTable[Index] = Address | PAGE_ATTRIBUTE_BITS;\r
         if (!IsAddressValid (Address, &Nx)) {\r
-          PageTable[Index] = PageTable[Index] & (INTN)(INT32)(~(IA32_PG_RW | IA32_PG_P));\r
+          PageTable[Index] = PageTable[Index] & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS);\r
         }\r
         if (Nx && mXdSupported) {\r
           PageTable[Index] = PageTable[Index] | IA32_PG_NX;\r
@@ -262,7 +262,7 @@ RestorePageTableAbove4G (
         //\r
         // Patch to remove present flag and rw flag.\r
         //\r
-        PageTable[PTIndex] = PageTable[PTIndex] & (INTN)(INT32)(~(IA32_PG_RW | IA32_PG_P));\r
+        PageTable[PTIndex] = PageTable[PTIndex] & (INTN)(INT32)(~PAGE_ATTRIBUTE_BITS);\r
       }\r
       //\r
       // Set XD bit to 1\r
@@ -289,7 +289,7 @@ RestorePageTableAbove4G (
   //\r
   // Add present flag or clear XD flag to make page fault handler succeed.\r
   //\r
-  PageTable[PTIndex] |= (UINT64)(IA32_PG_RW | IA32_PG_P);\r
+  PageTable[PTIndex] |= (UINT64)(PAGE_ATTRIBUTE_BITS);\r
   if ((ErrorCode & IA32_PF_EC_ID) != 0) {\r
     //\r
     // If page fault is caused by instruction fetch, clear XD bit in the entry.\r