/** @file\r
C functions in SEC\r
\r
- Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
@param BootFirmwareVolume Base address of the Boot Firmware Volume.\r
**/\r
VOID\r
+NORETURN\r
EFIAPI\r
SecStartup (\r
IN UINT32 SizeOfRam,\r
//\r
SecCoreData.DataSize = (UINT16) sizeof (EFI_SEC_PEI_HAND_OFF);\r
SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
- SecCoreData.BootFirmwareVolumeSize = (UINTN)(0x100000000ULL - (UINTN) BootFirmwareVolume);\r
+ SecCoreData.BootFirmwareVolumeSize = (UINTN)((EFI_FIRMWARE_VOLUME_HEADER *) BootFirmwareVolume)->FvLength;\r
SecCoreData.TemporaryRamBase = (VOID*)(UINTN) TempRamBase;\r
SecCoreData.TemporaryRamSize = SizeOfRam;\r
SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;\r
// Initialize Debug Agent to support source level debug in SEC/PEI phases before memory ready.\r
//\r
InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, &SecCoreData, SecStartupPhase2);\r
+\r
+ //\r
+ // Should not come here.\r
+ //\r
+ UNREACHABLE ();\r
}\r
\r
/**\r
EFI_PEI_PPI_DESCRIPTOR *AllSecPpiList;\r
EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint;\r
\r
+ PeiCoreEntryPoint = NULL;\r
SecCoreData = (EFI_SEC_PEI_HAND_OFF *) Context;\r
- AllSecPpiList = (EFI_PEI_PPI_DESCRIPTOR *) SecCoreData->PeiTemporaryRamBase;\r
+\r
+ //\r
+ // Perform platform specific initialization before entering PeiCore.\r
+ //\r
+ PpiList = SecPlatformMain (SecCoreData);\r
//\r
// Find Pei Core entry point. It will report SEC and Pei Core debug information if remote debug\r
// is enabled.\r
//\r
- FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase, &PeiCoreEntryPoint);\r
- if (PeiCoreEntryPoint == NULL)\r
- {\r
- CpuDeadLoop ();\r
+ if (PpiList != NULL) {\r
+ Index = 0;\r
+ do {\r
+ if (CompareGuid (PpiList[Index].Guid, &gEfiPeiCoreFvLocationPpiGuid) &&\r
+ (((EFI_PEI_CORE_FV_LOCATION_PPI *) PpiList[Index].Ppi)->PeiCoreFvLocation != 0)\r
+ ) {\r
+ //\r
+ // In this case, SecCore is in BFV but PeiCore is in another FV reported by PPI.\r
+ //\r
+ FindAndReportEntryPoints (\r
+ (EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
+ (EFI_FIRMWARE_VOLUME_HEADER *) ((EFI_PEI_CORE_FV_LOCATION_PPI *) PpiList[Index].Ppi)->PeiCoreFvLocation,\r
+ &PeiCoreEntryPoint\r
+ );\r
+ if (PeiCoreEntryPoint != NULL) {\r
+ break;\r
+ } else {\r
+ //\r
+ // Invalid PeiCore FV provided by platform\r
+ //\r
+ CpuDeadLoop ();\r
+ }\r
+ }\r
+ } while ((PpiList[Index++].Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) != EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);\r
}\r
-\r
//\r
- // Perform platform specific initialization before entering PeiCore.\r
+ // If EFI_PEI_CORE_FV_LOCATION_PPI not found, try to locate PeiCore from BFV.\r
//\r
- PpiList = SecPlatformMain (SecCoreData);\r
+ if (PeiCoreEntryPoint == NULL) {\r
+ //\r
+ // Both SecCore and PeiCore are in BFV.\r
+ //\r
+ FindAndReportEntryPoints (\r
+ (EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
+ (EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->BootFirmwareVolumeBase,\r
+ &PeiCoreEntryPoint\r
+ );\r
+ if (PeiCoreEntryPoint == NULL) {\r
+ CpuDeadLoop ();\r
+ }\r
+ }\r
+\r
if (PpiList != NULL) {\r
+ AllSecPpiList = (EFI_PEI_PPI_DESCRIPTOR *) SecCoreData->PeiTemporaryRamBase;\r
+\r
//\r
// Remove the terminal flag from the terminal PPI\r
//\r
// will be built based on them in PEI phase.\r
//\r
SecCoreData->PeiTemporaryRamBase = (VOID *)(((UINTN)SecCoreData->PeiTemporaryRamBase + 7) & ~0x07);\r
- SecCoreData->PeiTemporaryRamSize &= ~0x07;\r
+ SecCoreData->PeiTemporaryRamSize &= ~(UINTN)0x07;\r
} else {\r
//\r
// No addition PPI, PpiList directly point to the common PPI list.\r