]> git.proxmox.com Git - mirror_edk2.git/blobdiff - Vlv2TbltDevicePkg/PlatformDxe/Platform.c
IntelSiliconPkg: Add VTd driver.
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformDxe / Platform.c
index a1cd072c8f304a1a12dfd3370d8c63d9bc6841a2..904a9a5a1fd0f4f83650e1b9f50817cca3ec1325 100644 (file)
@@ -482,18 +482,6 @@ SpiBiosProtectionFunction(
     B_PCH_SPI_PR0_RPE|B_PCH_SPI_PR0_WPE|\\r
     (B_PCH_SPI_PR0_PRB_MASK&(BiosFlaLower0>>12))|(B_PCH_SPI_PR0_PRL_MASK&(BiosFlaLimit0>>12)<<16));\r
 \r
-  //\r
-  //Lock down PR0\r
-  //\r
-  MmioOr16 ((UINTN) (SpiBase + R_PCH_SPI_HSFS), (UINT16) (B_PCH_SPI_HSFS_FLOCKDN));\r
-\r
-  //\r
-  // Verify if it's really locked.\r
-  //\r
-  if ((MmioRead16 (SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) == 0) {\r
-    DEBUG((EFI_D_ERROR, "Failed to lock down PR0.\n"));\r
-  }\r
-\r
   //\r
   //Set PR1\r
   //\r
@@ -503,7 +491,7 @@ SpiBiosProtectionFunction(
     (B_PCH_SPI_PR1_PRB_MASK&(BiosFlaLower1>>12))|(B_PCH_SPI_PR1_PRL_MASK&(BiosFlaLimit1>>12)<<16));\r
 \r
   //\r
-  //Lock down PR1\r
+  //Lock down PRx\r
   //\r
   MmioOr16 ((UINTN) (SpiBase + R_PCH_SPI_HSFS), (UINT16) (B_PCH_SPI_HSFS_FLOCKDN));\r
 \r
@@ -511,7 +499,7 @@ SpiBiosProtectionFunction(
   // Verify if it's really locked.\r
   //\r
   if ((MmioRead16 (SpiBase + R_PCH_SPI_HSFS) & B_PCH_SPI_HSFS_FLOCKDN) == 0) {\r
-    DEBUG((EFI_D_ERROR, "Failed to lock down PR1.\n"));\r
+    DEBUG((EFI_D_ERROR, "Failed to lock down PRx.\n"));\r
   }\r
   return;\r
 \r
@@ -525,16 +513,15 @@ InitPciDevPME (
   )\r
 {\r
   UINTN                  VarSize;\r
-  EFI_STATUS             Status;\r
 \r
   VarSize = sizeof(SYSTEM_CONFIGURATION);\r
-  Status = gRT->GetVariable(\r
-                  NORMAL_SETUP_NAME,\r
-                  &gEfiNormalSetupGuid,\r
-                  NULL,\r
-                  &VarSize,\r
-                  &mSystemConfiguration\r
-                  );\r
+  gRT->GetVariable(\r
+         NORMAL_SETUP_NAME,\r
+         &gEfiNormalSetupGuid,\r
+         NULL,\r
+         &VarSize,\r
+         &mSystemConfiguration\r
+         );\r
 \r
   //\r
   //Program HDA PME_EN\r
@@ -576,6 +563,31 @@ InitPciDevPME (
   }\r
 }\r
 \r
+VOID\r
+EFIAPI\r
+InitThermalZone (\r
+  EFI_EVENT  Event,\r
+  VOID       *Context\r
+  )\r
+{\r
+  UINTN                  VarSize;\r
+  EFI_GLOBAL_NVS_AREA_PROTOCOL       *GlobalNvsArea;\r
+  VarSize = sizeof(SYSTEM_CONFIGURATION);\r
+  gRT->GetVariable(\r
+         NORMAL_SETUP_NAME,\r
+         &gEfiNormalSetupGuid,\r
+         NULL,\r
+         &VarSize,\r
+         &mSystemConfiguration\r
+         );\r
+  gBS->LocateProtocol (\r
+         &gEfiGlobalNvsAreaProtocolGuid,\r
+         NULL,\r
+         (void **)&GlobalNvsArea\r
+         );\r
+  GlobalNvsArea->Area->CriticalThermalTripPoint = mSystemConfiguration.CriticalThermalTripPoint;\r
+  GlobalNvsArea->Area->PassiveThermalTripPoint = mSystemConfiguration.PassiveThermalTripPoint;\r
+}\r
 #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY\r
 \r
 #endif\r
@@ -830,7 +842,16 @@ InitializePlatform (
                &mReadyToBootEvent\r
                );\r
   }\r
-\r
+  //\r
+  // Create a ReadyToBoot Event to run the thermalzone init process\r
+  //\r
+  Status = EfiCreateEventReadyToBootEx (\r
+             TPL_CALLBACK,\r
+             InitThermalZone,\r
+             NULL,\r
+             &mReadyToBootEvent\r
+             );  \r
\r
   ReportStatusCodeEx (\r
     EFI_PROGRESS_CODE,\r
     EFI_COMPUTING_UNIT_CHIPSET | EFI_CU_PLATFORM_DXE_STEP1,\r