arm64: Move post_ttbr_update_workaround to C code

[mirror_ubuntu-artful-kernel.git] / arch / arm64 / include / asm / assembler.h

diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 1b67c3782d005b5d1872e0ceedcf4250b3b3d8c9..463619dcadd4a9ac9c4aa2b984764a4aa0817dc8 100644 (file)
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -25,7 +25,6 @@
 
 #include <asm/asm-offsets.h>
 #include <asm/cpufeature.h>
-#include <asm/mmu_context.h>
 #include <asm/page.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/ptrace.h>
@@ -96,6 +95,24 @@
        dmb     \opt
        .endm
 
+/*
+ * Value prediction barrier
+ */
+       .macro  csdb
+       hint    #20
+       .endm
+
+/*
+ * Sanitise a 64-bit bounded index wrt speculation, returning zero if out
+ * of bounds.
+ */
+       .macro  mask_nospec64, idx, limit, tmp
+       sub     \tmp, \idx, \limit
+       bic     \tmp, \tmp, \idx
+       and     \idx, \idx, \tmp, asr #63
+       csdb
+       .endm
+
 /*
  * NOP sequence
  */
@@ -230,12 +247,18 @@ lr        .req    x30             // link register
        .endm
 
        /*
-        * @dst: Result of per_cpu(sym, smp_processor_id())
+        * @dst: Result of per_cpu(sym, smp_processor_id()), can be SP for
+        *       non-module code
         * @sym: The name of the per-cpu variable
         * @tmp: scratch register
         */
        .macro adr_this_cpu, dst, sym, tmp
+#ifndef MODULE
+       adrp    \tmp, \sym
+       add     \dst, \tmp, #:lo12:\sym
+#else
        adr_l   \dst, \sym
+#endif
        mrs     \tmp, tpidr_el1
        add     \dst, \dst, \tmp
        .endm
@@ -352,6 +375,12 @@ alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE
        dc      \op, \kaddr
 alternative_else
        dc      civac, \kaddr
+alternative_endif
+       .elseif (\op == cvap)
+alternative_if ARM64_HAS_DCPOP
+       sys 3, c7, c12, 1, \kaddr       // dc cvap
+alternative_else
+       dc      cvac, \kaddr
 alternative_endif
        .else
        dc      \op, \kaddr
@@ -403,6 +432,17 @@ alternative_endif
        .size   __pi_##x, . - x;        \
        ENDPROC(x)
 
+/*
+ * Annotate a function as being unsuitable for kprobes.
+ */
+#ifdef CONFIG_KPROBES
+#define NOKPROBE(x)                            \
+       .pushsection "_kprobe_blacklist", "aw"; \
+       .quad   x;                              \
+       .popsection;
+#else
+#define NOKPROBE(x)
+#endif
        /*
         * Emit a 64-bit absolute little endian symbol reference in a way that
         * ensures that it will be resolved at build time, even when building a
@@ -441,39 +481,18 @@ alternative_endif
        mrs     \rd, sp_el0
        .endm
 
-/*
- * Errata workaround prior to TTBR0_EL1 update
- *
- *     val:    TTBR value with new BADDR, preserved
- *     tmp0:   temporary register, clobbered
- *     tmp1:   other temporary register, clobbered
+/**
+ * Errata workaround prior to disable MMU. Insert an ISB immediately prior
+ * to executing the MSR that will change SCTLR_ELn[M] from a value of 1 to 0.
  */
-       .macro  pre_ttbr0_update_workaround, val, tmp0, tmp1
-#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1003
-alternative_if ARM64_WORKAROUND_QCOM_FALKOR_E1003
-       mrs     \tmp0, ttbr0_el1
-       mov     \tmp1, #FALKOR_RESERVED_ASID
-       bfi     \tmp0, \tmp1, #48, #16          // reserved ASID + old BADDR
-       msr     ttbr0_el1, \tmp0
-       isb
-       bfi     \tmp0, \val, #0, #48            // reserved ASID + new BADDR
-       msr     ttbr0_el1, \tmp0
+       .macro pre_disable_mmu_workaround
+#ifdef CONFIG_QCOM_FALKOR_ERRATUM_E1041
        isb
-alternative_else_nop_endif
 #endif
        .endm
 
-/*
- * Errata workaround post TTBR0_EL1 update.
- */
-       .macro  post_ttbr0_update_workaround
-#ifdef CONFIG_CAVIUM_ERRATUM_27456
-alternative_if ARM64_WORKAROUND_CAVIUM_27456
-       ic      iallu
-       dsb     nsh
-       isb
-alternative_else_nop_endif
-#endif
+       .macro  pte_to_phys, phys, pte
+       and     \phys, \pte, #(((1 << (48 - PAGE_SHIFT)) - 1) << PAGE_SHIFT)
        .endm
 
 #endif /* __ASM_ASSEMBLER_H */