Remove 'type' argument from access_ok() function

[mirror_ubuntu-disco-kernel.git] / arch / mips / kernel / unaligned.c

diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index c60e7719ef77e434803b3f47aa7add3883416035..595ca9c851110db0a76847f596ba21197db9aaf9 100644 (file)
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -936,7 +936,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                if (insn.dsp_format.func == lx_op) {
                        switch (insn.dsp_format.op) {
                        case lwx_op:
-                               if (!access_ok(VERIFY_READ, addr, 4))
+                               if (!access_ok(addr, 4))
                                        goto sigbus;
                                LoadW(addr, value, res);
                                if (res)
@@ -945,7 +945,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                                regs->regs[insn.dsp_format.rd] = value;
                                break;
                        case lhx_op:
-                               if (!access_ok(VERIFY_READ, addr, 2))
+                               if (!access_ok(addr, 2))
                                        goto sigbus;
                                LoadHW(addr, value, res);
                                if (res)
@@ -968,7 +968,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                        set_fs(USER_DS);
                        switch (insn.spec3_format.func) {
                        case lhe_op:
-                               if (!access_ok(VERIFY_READ, addr, 2)) {
+                               if (!access_ok(addr, 2)) {
                                        set_fs(seg);
                                        goto sigbus;
                                }
@@ -981,7 +981,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                                regs->regs[insn.spec3_format.rt] = value;
                                break;
                        case lwe_op:
-                               if (!access_ok(VERIFY_READ, addr, 4)) {
+                               if (!access_ok(addr, 4)) {
                                        set_fs(seg);
                                        goto sigbus;
                                }
@@ -994,7 +994,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                                regs->regs[insn.spec3_format.rt] = value;
                                break;
                        case lhue_op:
-                               if (!access_ok(VERIFY_READ, addr, 2)) {
+                               if (!access_ok(addr, 2)) {
                                        set_fs(seg);
                                        goto sigbus;
                                }
@@ -1007,7 +1007,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                                regs->regs[insn.spec3_format.rt] = value;
                                break;
                        case she_op:
-                               if (!access_ok(VERIFY_WRITE, addr, 2)) {
+                               if (!access_ok(addr, 2)) {
                                        set_fs(seg);
                                        goto sigbus;
                                }
@@ -1020,7 +1020,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                                }
                                break;
                        case swe_op:
-                               if (!access_ok(VERIFY_WRITE, addr, 4)) {
+                               if (!access_ok(addr, 4)) {
                                        set_fs(seg);
                                        goto sigbus;
                                }
@@ -1041,7 +1041,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
 #endif
                break;
        case lh_op:
-               if (!access_ok(VERIFY_READ, addr, 2))
+               if (!access_ok(addr, 2))
                        goto sigbus;
 
                if (IS_ENABLED(CONFIG_EVA)) {
@@ -1060,7 +1060,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                break;
 
        case lw_op:
-               if (!access_ok(VERIFY_READ, addr, 4))
+               if (!access_ok(addr, 4))
                        goto sigbus;
 
                if (IS_ENABLED(CONFIG_EVA)) {
@@ -1079,7 +1079,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                break;
 
        case lhu_op:
-               if (!access_ok(VERIFY_READ, addr, 2))
+               if (!access_ok(addr, 2))
                        goto sigbus;
 
                if (IS_ENABLED(CONFIG_EVA)) {
@@ -1106,7 +1106,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                 * would blow up, so for now we don't handle unaligned 64-bit
                 * instructions on 32-bit kernels.
                 */
-               if (!access_ok(VERIFY_READ, addr, 4))
+               if (!access_ok(addr, 4))
                        goto sigbus;
 
                LoadWU(addr, value, res);
@@ -1129,7 +1129,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                 * would blow up, so for now we don't handle unaligned 64-bit
                 * instructions on 32-bit kernels.
                 */
-               if (!access_ok(VERIFY_READ, addr, 8))
+               if (!access_ok(addr, 8))
                        goto sigbus;
 
                LoadDW(addr, value, res);
@@ -1144,7 +1144,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                goto sigill;
 
        case sh_op:
-               if (!access_ok(VERIFY_WRITE, addr, 2))
+               if (!access_ok(addr, 2))
                        goto sigbus;
 
                compute_return_epc(regs);
@@ -1164,7 +1164,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                break;
 
        case sw_op:
-               if (!access_ok(VERIFY_WRITE, addr, 4))
+               if (!access_ok(addr, 4))
                        goto sigbus;
 
                compute_return_epc(regs);
@@ -1192,7 +1192,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                 * would blow up, so for now we don't handle unaligned 64-bit
                 * instructions on 32-bit kernels.
                 */
-               if (!access_ok(VERIFY_WRITE, addr, 8))
+               if (!access_ok(addr, 8))
                        goto sigbus;
 
                compute_return_epc(regs);
@@ -1254,7 +1254,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
 
                switch (insn.msa_mi10_format.func) {
                case msa_ld_op:
-                       if (!access_ok(VERIFY_READ, addr, sizeof(*fpr)))
+                       if (!access_ok(addr, sizeof(*fpr)))
                                goto sigbus;
 
                        do {
@@ -1290,7 +1290,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
                        break;
 
                case msa_st_op:
-                       if (!access_ok(VERIFY_WRITE, addr, sizeof(*fpr)))
+                       if (!access_ok(addr, sizeof(*fpr)))
                                goto sigbus;
 
                        /*
@@ -1463,7 +1463,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
                        if (reg == 31)
                                goto sigbus;
 
-                       if (!access_ok(VERIFY_READ, addr, 8))
+                       if (!access_ok(addr, 8))
                                goto sigbus;
 
                        LoadW(addr, value, res);
@@ -1482,7 +1482,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
                        if (reg == 31)
                                goto sigbus;
 
-                       if (!access_ok(VERIFY_WRITE, addr, 8))
+                       if (!access_ok(addr, 8))
                                goto sigbus;
 
                        value = regs->regs[reg];
@@ -1502,7 +1502,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
                        if (reg == 31)
                                goto sigbus;
 
-                       if (!access_ok(VERIFY_READ, addr, 16))
+                       if (!access_ok(addr, 16))
                                goto sigbus;
 
                        LoadDW(addr, value, res);
@@ -1525,7 +1525,7 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
                        if (reg == 31)
                                goto sigbus;
 
-                       if (!access_ok(VERIFY_WRITE, addr, 16))
+                       if (!access_ok(addr, 16))
                                goto sigbus;
 
                        value = regs->regs[reg];
@@ -1548,11 +1548,10 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
                        if ((rvar > 9) || !reg)
                                goto sigill;
                        if (reg & 0x10) {
-                               if (!access_ok
-                                   (VERIFY_READ, addr, 4 * (rvar + 1)))
+                               if (!access_ok(addr, 4 * (rvar + 1)))
                                        goto sigbus;
                        } else {
-                               if (!access_ok(VERIFY_READ, addr, 4 * rvar))
+                               if (!access_ok(addr, 4 * rvar))
                                        goto sigbus;
                        }
                        if (rvar == 9)
@@ -1585,11 +1584,10 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
                        if ((rvar > 9) || !reg)
                                goto sigill;
                        if (reg & 0x10) {
-                               if (!access_ok
-                                   (VERIFY_WRITE, addr, 4 * (rvar + 1)))
+                               if (!access_ok(addr, 4 * (rvar + 1)))
                                        goto sigbus;
                        } else {
-                               if (!access_ok(VERIFY_WRITE, addr, 4 * rvar))
+                               if (!access_ok(addr, 4 * rvar))
                                        goto sigbus;
                        }
                        if (rvar == 9)
@@ -1623,11 +1621,10 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
                        if ((rvar > 9) || !reg)
                                goto sigill;
                        if (reg & 0x10) {
-                               if (!access_ok
-                                   (VERIFY_READ, addr, 8 * (rvar + 1)))
+                               if (!access_ok(addr, 8 * (rvar + 1)))
                                        goto sigbus;
                        } else {
-                               if (!access_ok(VERIFY_READ, addr, 8 * rvar))
+                               if (!access_ok(addr, 8 * rvar))
                                        goto sigbus;
                        }
                        if (rvar == 9)
@@ -1665,11 +1662,10 @@ static void emulate_load_store_microMIPS(struct pt_regs *regs,
                        if ((rvar > 9) || !reg)
                                goto sigill;
                        if (reg & 0x10) {
-                               if (!access_ok
-                                   (VERIFY_WRITE, addr, 8 * (rvar + 1)))
+                               if (!access_ok(addr, 8 * (rvar + 1)))
                                        goto sigbus;
                        } else {
-                               if (!access_ok(VERIFY_WRITE, addr, 8 * rvar))
+                               if (!access_ok(addr, 8 * rvar))
                                        goto sigbus;
                        }
                        if (rvar == 9)
@@ -1788,7 +1784,7 @@ fpu_emul:
                case mm_lwm16_op:
                        reg = insn.mm16_m_format.rlist;
                        rvar = reg + 1;
-                       if (!access_ok(VERIFY_READ, addr, 4 * rvar))
+                       if (!access_ok(addr, 4 * rvar))
                                goto sigbus;
 
                        for (i = 16; rvar; rvar--, i++) {
@@ -1808,7 +1804,7 @@ fpu_emul:
                case mm_swm16_op:
                        reg = insn.mm16_m_format.rlist;
                        rvar = reg + 1;
-                       if (!access_ok(VERIFY_WRITE, addr, 4 * rvar))
+                       if (!access_ok(addr, 4 * rvar))
                                goto sigbus;
 
                        for (i = 16; rvar; rvar--, i++) {
@@ -1862,7 +1858,7 @@ fpu_emul:
        }
 
 loadHW:
-       if (!access_ok(VERIFY_READ, addr, 2))
+       if (!access_ok(addr, 2))
                goto sigbus;
 
        LoadHW(addr, value, res);
@@ -1872,7 +1868,7 @@ loadHW:
        goto success;
 
 loadHWU:
-       if (!access_ok(VERIFY_READ, addr, 2))
+       if (!access_ok(addr, 2))
                goto sigbus;
 
        LoadHWU(addr, value, res);
@@ -1882,7 +1878,7 @@ loadHWU:
        goto success;
 
 loadW:
-       if (!access_ok(VERIFY_READ, addr, 4))
+       if (!access_ok(addr, 4))
                goto sigbus;
 
        LoadW(addr, value, res);
@@ -1900,7 +1896,7 @@ loadWU:
         * would blow up, so for now we don't handle unaligned 64-bit
         * instructions on 32-bit kernels.
         */
-       if (!access_ok(VERIFY_READ, addr, 4))
+       if (!access_ok(addr, 4))
                goto sigbus;
 
        LoadWU(addr, value, res);
@@ -1922,7 +1918,7 @@ loadDW:
         * would blow up, so for now we don't handle unaligned 64-bit
         * instructions on 32-bit kernels.
         */
-       if (!access_ok(VERIFY_READ, addr, 8))
+       if (!access_ok(addr, 8))
                goto sigbus;
 
        LoadDW(addr, value, res);
@@ -1936,7 +1932,7 @@ loadDW:
        goto sigill;
 
 storeHW:
-       if (!access_ok(VERIFY_WRITE, addr, 2))
+       if (!access_ok(addr, 2))
                goto sigbus;
 
        value = regs->regs[reg];
@@ -1946,7 +1942,7 @@ storeHW:
        goto success;
 
 storeW:
-       if (!access_ok(VERIFY_WRITE, addr, 4))
+       if (!access_ok(addr, 4))
                goto sigbus;
 
        value = regs->regs[reg];
@@ -1964,7 +1960,7 @@ storeDW:
         * would blow up, so for now we don't handle unaligned 64-bit
         * instructions on 32-bit kernels.
         */
-       if (!access_ok(VERIFY_WRITE, addr, 8))
+       if (!access_ok(addr, 8))
                goto sigbus;
 
        value = regs->regs[reg];
@@ -2122,7 +2118,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
                goto sigbus;
 
        case MIPS16e_lh_op:
-               if (!access_ok(VERIFY_READ, addr, 2))
+               if (!access_ok(addr, 2))
                        goto sigbus;
 
                LoadHW(addr, value, res);
@@ -2133,7 +2129,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
                break;
 
        case MIPS16e_lhu_op:
-               if (!access_ok(VERIFY_READ, addr, 2))
+               if (!access_ok(addr, 2))
                        goto sigbus;
 
                LoadHWU(addr, value, res);
@@ -2146,7 +2142,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
        case MIPS16e_lw_op:
        case MIPS16e_lwpc_op:
        case MIPS16e_lwsp_op:
-               if (!access_ok(VERIFY_READ, addr, 4))
+               if (!access_ok(addr, 4))
                        goto sigbus;
 
                LoadW(addr, value, res);
@@ -2165,7 +2161,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
                 * would blow up, so for now we don't handle unaligned 64-bit
                 * instructions on 32-bit kernels.
                 */
-               if (!access_ok(VERIFY_READ, addr, 4))
+               if (!access_ok(addr, 4))
                        goto sigbus;
 
                LoadWU(addr, value, res);
@@ -2189,7 +2185,7 @@ loadDW:
                 * would blow up, so for now we don't handle unaligned 64-bit
                 * instructions on 32-bit kernels.
                 */
-               if (!access_ok(VERIFY_READ, addr, 8))
+               if (!access_ok(addr, 8))
                        goto sigbus;
 
                LoadDW(addr, value, res);
@@ -2204,7 +2200,7 @@ loadDW:
                goto sigill;
 
        case MIPS16e_sh_op:
-               if (!access_ok(VERIFY_WRITE, addr, 2))
+               if (!access_ok(addr, 2))
                        goto sigbus;
 
                MIPS16e_compute_return_epc(regs, &oldinst);
@@ -2217,7 +2213,7 @@ loadDW:
        case MIPS16e_sw_op:
        case MIPS16e_swsp_op:
        case MIPS16e_i8_op:     /* actually - MIPS16e_swrasp_func */
-               if (!access_ok(VERIFY_WRITE, addr, 4))
+               if (!access_ok(addr, 4))
                        goto sigbus;
 
                MIPS16e_compute_return_epc(regs, &oldinst);
@@ -2237,7 +2233,7 @@ writeDW:
                 * would blow up, so for now we don't handle unaligned 64-bit
                 * instructions on 32-bit kernels.
                 */
-               if (!access_ok(VERIFY_WRITE, addr, 8))
+               if (!access_ok(addr, 8))
                        goto sigbus;
 
                MIPS16e_compute_return_epc(regs, &oldinst);