MIPS disas support

[qemu.git] / cpu-defs.h

diff --git a/cpu-defs.h b/cpu-defs.h
index 59a0c0f32e194437d0b825108c3967009fe74fd0..c58d271391025f4d594bc4e01a90f17544458fe1 100644 (file)
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -29,18 +29,45 @@
 #error TARGET_LONG_BITS must be defined before including this header
 #endif
 
+#ifndef TARGET_PHYS_ADDR_BITS 
+#if TARGET_LONG_BITS >= HOST_LONG_BITS
+#define TARGET_PHYS_ADDR_BITS TARGET_LONG_BITS
+#else
+#define TARGET_PHYS_ADDR_BITS HOST_LONG_BITS
+#endif
+#endif
+
 #define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8)
 
+/* target_ulong is the type of a virtual address */
 #if TARGET_LONG_SIZE == 4
 typedef int32_t target_long;
 typedef uint32_t target_ulong;
+#define TARGET_FMT_lx "%08x"
 #elif TARGET_LONG_SIZE == 8
 typedef int64_t target_long;
 typedef uint64_t target_ulong;
+#define TARGET_FMT_lx "%016llx"
 #else
 #error TARGET_LONG_SIZE undefined
 #endif
 
+/* target_phys_addr_t is the type of a physical address (its size can
+   be different from 'target_ulong'). We have sizeof(target_phys_addr)
+   = max(sizeof(unsigned long),
+   sizeof(size_of_target_physical_address)) because we must pass a
+   host pointer to memory operations in some cases */
+
+#if TARGET_PHYS_ADDR_BITS == 32
+typedef uint32_t target_phys_addr_t;
+#elif TARGET_PHYS_ADDR_BITS == 64
+typedef uint64_t target_phys_addr_t;
+#else
+#error TARGET_PHYS_ADDR_BITS undefined
+#endif
+
+#define HOST_LONG_SIZE (HOST_LONG_BITS / 8)
+
 #define EXCP_INTERRUPT         256 /* async interruption */
 #define EXCP_HLT        257 /* hlt instruction reached */
 #define EXCP_DEBUG      258 /* cpu stopped after a breakpoint or singlestep */
@@ -56,9 +83,9 @@ typedef struct CPUTLBEntry {
        bit 3                      : indicates that the entry is invalid
        bit 2..0                   : zero
     */
-    uint32_t address; 
+    target_ulong address; 
     /* addend to virtual address to get physical address */
-    uint32_t addend; 
+    target_phys_addr_t addend; 
 } CPUTLBEntry;
 
 #endif