ia64 host support (David Mosberger)

[qemu.git] / cpu-exec.c

diff --git a/cpu-exec.c b/cpu-exec.c
index 432e6020dfbe94f891e12a441cbd7c25c6f8cab2..59f127747e946381e982aeb6af01d0c4ee00b430 100644 (file)
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -573,6 +573,15 @@ int cpu_exec(CPUState *env1)
             );
     }
 }
+#elif defined(__ia64)
+               struct fptr {
+                       void *ip;
+                       void *gp;
+               } fp;
+
+               fp.ip = tc_ptr;
+               fp.gp = code_gen_buffer + 2 * (1 << 20);
+               (*(void (*)(void)) &fp)();
 #else
                 gen_func();
 #endif
@@ -1118,6 +1127,40 @@ int cpu_signal_handler(int host_signum, struct siginfo *info,
                              &uc->uc_sigmask, puc);
 }
 
+#elif defined(__ia64)
+
+#ifndef __ISR_VALID
+  /* This ought to be in <bits/siginfo.h>... */
+# define __ISR_VALID   1
+# define si_flags      _sifields._sigfault._si_pad0
+#endif
+
+int cpu_signal_handler(int host_signum, struct siginfo *info, void *puc)
+{
+    struct ucontext *uc = puc;
+    unsigned long ip;
+    int is_write = 0;
+
+    ip = uc->uc_mcontext.sc_ip;
+    switch (host_signum) {
+      case SIGILL:
+      case SIGFPE:
+      case SIGSEGV:
+      case SIGBUS:
+      case SIGTRAP:
+         if (info->si_code && (info->si_flags & __ISR_VALID))
+             /* ISR.W (write-access) is bit 33:  */
+             is_write = (info->si_isr >> 33) & 1;
+         break;
+
+      default:
+         break;
+    }
+    return handle_cpu_signal(ip, (unsigned long)info->si_addr,
+                             is_write,
+                             &uc->uc_sigmask, puc);
+}
+
 #else
 
 #error host CPU specific signal handler needed