Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[mirror_ubuntu-disco-kernel.git] / drivers / gpu / drm / amd / amdgpu / gmc_v8_0.c

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index d71d4cb68f9c0a7f0ce4137621d2ac199e794570..1edbe6b477b56dc309a49eb1d5a2e68d11ffa8be 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -138,6 +138,7 @@ static void gmc_v8_0_init_golden_registers(struct amdgpu_device *adev)
                break;
        case CHIP_POLARIS11:
        case CHIP_POLARIS12:
+       case CHIP_VEGAM:
                amdgpu_device_program_register_sequence(adev,
                                                        golden_settings_polaris11_a11,
                                                        ARRAY_SIZE(golden_settings_polaris11_a11));
@@ -231,6 +232,7 @@ static int gmc_v8_0_init_microcode(struct amdgpu_device *adev)
        case CHIP_FIJI:
        case CHIP_CARRIZO:
        case CHIP_STONEY:
+       case CHIP_VEGAM:
                return 0;
        default: BUG();
        }
@@ -567,9 +569,10 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
        /* set the gart size */
        if (amdgpu_gart_size == -1) {
                switch (adev->asic_type) {
-               case CHIP_POLARIS11: /* all engines support GPUVM */
                case CHIP_POLARIS10: /* all engines support GPUVM */
+               case CHIP_POLARIS11: /* all engines support GPUVM */
                case CHIP_POLARIS12: /* all engines support GPUVM */
+               case CHIP_VEGAM:     /* all engines support GPUVM */
                default:
                        adev->gmc.gart_size = 256ULL << 20;
                        break;
@@ -1049,12 +1052,33 @@ static int gmc_v8_0_late_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+       amdgpu_bo_late_init(adev);
+
        if (amdgpu_vm_fault_stop != AMDGPU_VM_FAULT_STOP_ALWAYS)
                return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0);
        else
                return 0;
 }
 
+static unsigned gmc_v8_0_get_vbios_fb_size(struct amdgpu_device *adev)
+{
+       u32 d1vga_control = RREG32(mmD1VGA_CONTROL);
+       unsigned size;
+
+       if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {
+               size = 9 * 1024 * 1024; /* reserve 8MB for vga emulator and 1 MB for FB */
+       } else {
+               u32 viewport = RREG32(mmVIEWPORT_SIZE);
+               size = (REG_GET_FIELD(viewport, VIEWPORT_SIZE, VIEWPORT_HEIGHT) *
+                       REG_GET_FIELD(viewport, VIEWPORT_SIZE, VIEWPORT_WIDTH) *
+                       4);
+       }
+       /* return 0 if the pre-OS buffer uses up most of vram */
+       if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024))
+               return 0;
+       return size;
+}
+
 #define mmMC_SEQ_MISC0_FIJI 0xA71
 
 static int gmc_v8_0_sw_init(void *handle)
@@ -1068,7 +1092,8 @@ static int gmc_v8_0_sw_init(void *handle)
        } else {
                u32 tmp;
 
-               if (adev->asic_type == CHIP_FIJI)
+               if ((adev->asic_type == CHIP_FIJI) ||
+                   (adev->asic_type == CHIP_VEGAM))
                        tmp = RREG32(mmMC_SEQ_MISC0_FIJI);
                else
                        tmp = RREG32(mmMC_SEQ_MISC0);
@@ -1096,8 +1121,6 @@ static int gmc_v8_0_sw_init(void *handle)
         */
        adev->gmc.mc_mask = 0xffffffffffULL; /* 40 bit MC */
 
-       adev->gmc.stolen_size = 256 * 1024;
-
        /* set DMA mask + need_dma32 flags.
         * PCIE - can handle 40-bits.
         * IGP - can handle 40-bits
@@ -1128,6 +1151,8 @@ static int gmc_v8_0_sw_init(void *handle)
        if (r)
                return r;
 
+       adev->gmc.stolen_size = gmc_v8_0_get_vbios_fb_size(adev);
+
        /* Memory manager */
        r = amdgpu_bo_init(adev);
        if (r)