Revert "Use correct types to enable > 2G support" (r4238), it is

[qemu.git] / exec.c

diff --git a/exec.c b/exec.c
index 06ccf283bca435bee61def974ba554fe92cb2b73..877de89f1d692668169968b368310ed1e8c7d0e1 100644 (file)
--- a/exec.c
+++ b/exec.c
@@ -74,10 +74,6 @@
 #define TARGET_VIRT_ADDR_SPACE_BITS 42
 #elif defined(TARGET_PPC64)
 #define TARGET_PHYS_ADDR_SPACE_BITS 42
-#elif defined(TARGET_X86_64) && !defined(USE_KQEMU)
-#define TARGET_PHYS_ADDR_SPACE_BITS 40
-#elif defined(TARGET_I386) && !defined(USE_KQEMU)
-#define TARGET_PHYS_ADDR_SPACE_BITS 36
 #else
 /* Note: for compatibility with kqemu, we use 32 bits for x86_64 */
 #define TARGET_PHYS_ADDR_SPACE_BITS 32
@@ -92,7 +88,7 @@ spinlock_t tb_lock = SPIN_LOCK_UNLOCKED;
 uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE] __attribute__((aligned (32)));
 uint8_t *code_gen_ptr;
 
-ram_addr_t phys_ram_size;
+int phys_ram_size;
 int phys_ram_fd;
 uint8_t *phys_ram_base;
 uint8_t *phys_ram_dirty;
@@ -117,7 +113,7 @@ typedef struct PageDesc {
 
 typedef struct PhysPageDesc {
     /* offset in host memory of the page + io_index in the low 12 bits */
-    ram_addr_t phys_offset;
+    uint32_t phys_offset;
 } PhysPageDesc;
 
 #define L2_BITS 10
@@ -128,14 +124,9 @@ typedef struct PhysPageDesc {
  */
 #define L1_BITS (TARGET_VIRT_ADDR_SPACE_BITS - L2_BITS - TARGET_PAGE_BITS)
 #else
-#define L1_BITS (TARGET_PHYS_ADDR_SPACE_BITS - L2_BITS - TARGET_PAGE_BITS)
+#define L1_BITS (32 - L2_BITS - TARGET_PAGE_BITS)
 #endif
 
-#undef L1_BITS
-#undef L2_BITS
-#define L1_BITS 13
-#define L2_BITS 13
-
 #define L1_SIZE (1 << L1_BITS)
 #define L2_SIZE (1 << L2_BITS)
 
@@ -243,7 +234,7 @@ static void page_init(void)
 #endif
 }
 
-static inline PageDesc *page_find_alloc(target_ulong index)
+static inline PageDesc *page_find_alloc(unsigned int index)
 {
     PageDesc **lp, *p;
 
@@ -258,7 +249,7 @@ static inline PageDesc *page_find_alloc(target_ulong index)
     return p + (index & (L2_SIZE - 1));
 }
 
-static inline PageDesc *page_find(target_ulong index)
+static inline PageDesc *page_find(unsigned int index)
 {
     PageDesc *p;
 
@@ -274,7 +265,6 @@ static PhysPageDesc *phys_page_find_alloc(target_phys_addr_t index, int alloc)
     PhysPageDesc *pd;
 
     p = (void **)l1_phys_map;
-#if 0
 #if TARGET_PHYS_ADDR_SPACE_BITS > 32
 
 #if TARGET_PHYS_ADDR_SPACE_BITS > (32 + L1_BITS)
@@ -290,7 +280,6 @@ static PhysPageDesc *phys_page_find_alloc(target_phys_addr_t index, int alloc)
         memset(p, 0, sizeof(void *) * L1_SIZE);
         *lp = p;
     }
-#endif
 #endif
     lp = p + ((index >> L2_BITS) & (L1_SIZE - 1));
     pd = *lp;
@@ -522,12 +511,12 @@ static inline void tb_reset_jump(TranslationBlock *tb, int n)
     tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n]));
 }
 
-static inline void tb_phys_invalidate(TranslationBlock *tb, target_ulong page_addr)
+static inline void tb_phys_invalidate(TranslationBlock *tb, unsigned int page_addr)
 {
     CPUState *env;
     PageDesc *p;
     unsigned int h, n1;
-    target_phys_addr_t phys_pc;
+    target_ulong phys_pc;
     TranslationBlock *tb1, *tb2;
 
     /* remove the TB from the hash list */
@@ -678,7 +667,7 @@ static void tb_gen_code(CPUState *env,
    the same physical page. 'is_cpu_write_access' should be true if called
    from a real cpu write access: the virtual CPU will exit the current
    TB if code is modified inside this TB. */
-void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end,
+void tb_invalidate_phys_page_range(target_ulong start, target_ulong end,
                                    int is_cpu_write_access)
 {
     int n, current_tb_modified, current_tb_not_found, current_flags;
@@ -791,7 +780,7 @@ void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t
 }
 
 /* len must be <= 8 and start must be a multiple of len */
-static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int len)
+static inline void tb_invalidate_phys_page_fast(target_ulong start, int len)
 {
     PageDesc *p;
     int offset, b;
@@ -820,7 +809,7 @@ static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int le
 }
 
 #if !defined(CONFIG_SOFTMMU)
-static void tb_invalidate_phys_page(target_phys_addr_t addr,
+static void tb_invalidate_phys_page(target_ulong addr,
                                     unsigned long pc, void *puc)
 {
     int n, current_flags, current_tb_modified;
@@ -1997,7 +1986,7 @@ static inline void tlb_set_dirty(CPUState *env,
 
 static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
                              int memory);
-static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys,
+static void *subpage_init (target_phys_addr_t base, uint32_t *phys,
                            int orig_memory);
 #define CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2, \
                       need_subpage)                                     \
@@ -2023,13 +2012,13 @@ static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys,
    page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an
    io memory page */
 void cpu_register_physical_memory(target_phys_addr_t start_addr,
-                                  ram_addr_t size,
-                                  ram_addr_t phys_offset)
+                                  unsigned long size,
+                                  unsigned long phys_offset)
 {
     target_phys_addr_t addr, end_addr;
     PhysPageDesc *p;
     CPUState *env;
-    ram_addr_t orig_size = size;
+    unsigned long orig_size = size;
     void *subpage;
 
     size = (size + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
@@ -2037,7 +2026,7 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr,
     for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) {
         p = phys_page_find(addr >> TARGET_PAGE_BITS);
         if (p && p->phys_offset != IO_MEM_UNASSIGNED) {
-            ram_addr_t orig_memory = p->phys_offset;
+            unsigned long orig_memory = p->phys_offset;
             target_phys_addr_t start_addr2, end_addr2;
             int need_subpage = 0;
 
@@ -2090,7 +2079,7 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr,
 }
 
 /* XXX: temporary until new memory mapping API */
-ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr)
+uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr)
 {
     PhysPageDesc *p;
 
@@ -2101,12 +2090,12 @@ ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr)
 }
 
 /* XXX: better than nothing */
-ram_addr_t qemu_ram_alloc(ram_addr_t size)
+ram_addr_t qemu_ram_alloc(unsigned int size)
 {
     ram_addr_t addr;
     if ((phys_ram_alloc_offset + size) >= phys_ram_size) {
-        fprintf(stderr, "Not enough memory (requested_size = %lu, max memory = %" PRIu64 ")\n",
-                size, (uint64_t)phys_ram_size);
+        fprintf(stderr, "Not enough memory (requested_size = %u, max memory = %d)\n",
+                size, phys_ram_size);
         abort();
     }
     addr = phys_ram_alloc_offset;
@@ -2449,7 +2438,7 @@ static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
     return 0;
 }
 
-static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys,
+static void *subpage_init (target_phys_addr_t base, uint32_t *phys,
                            int orig_memory)
 {
     subpage_t *mmio;