#include "apic.h"
#include "apic_internal.h"
#include "trace.h"
+#include "sysemu/kvm.h"
static int apic_irq_delivered;
+bool apic_report_tpr_access;
void cpu_set_apic_base(DeviceState *d, uint64_t val)
{
- APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
- APICCommonInfo *info;
-
trace_cpu_set_apic_base(val);
- if (s) {
- info = DO_UPCAST(APICCommonInfo, busdev.qdev, s->busdev.qdev.info);
+ if (d) {
+ APICCommonState *s = APIC_COMMON(d);
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
info->set_base(s, val);
}
}
uint64_t cpu_get_apic_base(DeviceState *d)
{
- APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
+ if (d) {
+ APICCommonState *s = APIC_COMMON(d);
+ trace_cpu_get_apic_base((uint64_t)s->apicbase);
+ return s->apicbase;
+ } else {
+ trace_cpu_get_apic_base(MSR_IA32_APICBASE_BSP);
+ return MSR_IA32_APICBASE_BSP;
+ }
+}
+
+void cpu_set_apic_tpr(DeviceState *d, uint8_t val)
+{
+ APICCommonState *s;
+ APICCommonClass *info;
- trace_cpu_get_apic_base(s ? (uint64_t)s->apicbase : 0);
+ if (!d) {
+ return;
+ }
- return s ? s->apicbase : 0;
+ s = APIC_COMMON(d);
+ info = APIC_COMMON_GET_CLASS(s);
+
+ info->set_tpr(s, val);
}
-void cpu_set_apic_tpr(DeviceState *d, uint8_t val)
+uint8_t cpu_get_apic_tpr(DeviceState *d)
+{
+ APICCommonState *s;
+ APICCommonClass *info;
+
+ if (!d) {
+ return 0;
+ }
+
+ s = APIC_COMMON(d);
+ info = APIC_COMMON_GET_CLASS(s);
+
+ return info->get_tpr(s);
+}
+
+void apic_enable_tpr_access_reporting(DeviceState *d, bool enable)
{
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
- APICCommonInfo *info;
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
- if (s) {
- info = DO_UPCAST(APICCommonInfo, busdev.qdev, s->busdev.qdev.info);
- info->set_tpr(s, val);
+ apic_report_tpr_access = enable;
+ if (info->enable_tpr_reporting) {
+ info->enable_tpr_reporting(s, enable);
}
}
-uint8_t cpu_get_apic_tpr(DeviceState *d)
+void apic_enable_vapic(DeviceState *d, hwaddr paddr)
+{
+ APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
+
+ s->vapic_paddr = paddr;
+ info->vapic_base_update(s);
+}
+
+void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
+ TPRAccess access)
{
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
- return s ? s->tpr >> 4 : 0;
+ vapic_report_tpr_access(s->vapic, &s->cpu->env, ip, access);
}
void apic_report_irq_delivered(int delivered)
void apic_deliver_nmi(DeviceState *d)
{
- APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
- APICCommonInfo *info;
+ APICCommonState *s = APIC_COMMON(d);
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
- info = DO_UPCAST(APICCommonInfo, busdev.qdev, s->busdev.qdev.info);
info->external_nmi(s);
}
s->timer_expiry = -1;
}
+void apic_designate_bsp(DeviceState *d)
+{
+ if (d == NULL) {
+ return;
+ }
+
+ APICCommonState *s = APIC_COMMON(d);
+ s->apicbase |= MSR_IA32_APICBASE_BSP;
+}
+
static void apic_reset_common(DeviceState *d)
{
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
bool bsp;
- bsp = cpu_is_bsp(s->cpu_env);
+ bsp = cpu_is_bsp(s->cpu);
s->apicbase = 0xfee00000 |
(bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
+ s->vapic_paddr = 0;
+ info->vapic_base_update(s);
+
apic_init_reset(d);
if (bsp) {
static int apic_load_old(QEMUFile *f, void *opaque, int version_id)
{
APICCommonState *s = opaque;
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
int i;
if (version_id > 2) {
s->next_time = qemu_get_be64(f);
if (version_id >= 2) {
- qemu_get_timer(f, s->timer);
+ s->timer_expiry = qemu_get_be64(f);
+ }
+
+ if (info->post_load) {
+ info->post_load(s);
}
return 0;
}
static int apic_init_common(SysBusDevice *dev)
{
- APICCommonState *s = FROM_SYSBUS(APICCommonState, dev);
- APICCommonInfo *info;
+ APICCommonState *s = APIC_COMMON(dev);
+ APICCommonClass *info;
+ static DeviceState *vapic;
static int apic_no;
if (apic_no >= MAX_APICS) {
}
s->idx = apic_no++;
- info = DO_UPCAST(APICCommonInfo, busdev.qdev, s->busdev.qdev.info);
+ info = APIC_COMMON_GET_CLASS(s);
info->init(s);
- sysbus_init_mmio(&s->busdev, &s->io_memory);
+ sysbus_init_mmio(dev, &s->io_memory);
+
+ /* Note: We need at least 1M to map the VAPIC option ROM */
+ if (!vapic && s->vapic_control & VAPIC_ENABLE_MASK &&
+ ram_size >= 1024 * 1024) {
+ vapic = sysbus_create_simple("kvmvapic", -1, NULL);
+ }
+ s->vapic = vapic;
+ if (apic_report_tpr_access && info->enable_tpr_reporting) {
+ info->enable_tpr_reporting(s, true);
+ }
+
return 0;
}
+static void apic_dispatch_pre_save(void *opaque)
+{
+ APICCommonState *s = APIC_COMMON(opaque);
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
+
+ if (info->pre_save) {
+ info->pre_save(s);
+ }
+}
+
static int apic_dispatch_post_load(void *opaque, int version_id)
{
- APICCommonState *s = opaque;
- APICCommonInfo *info =
- DO_UPCAST(APICCommonInfo, busdev.qdev, s->busdev.qdev.info);
+ APICCommonState *s = APIC_COMMON(opaque);
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
if (info->post_load) {
info->post_load(s);
.minimum_version_id = 3,
.minimum_version_id_old = 1,
.load_state_old = apic_load_old,
+ .pre_save = apic_dispatch_pre_save,
.post_load = apic_dispatch_post_load,
.fields = (VMStateField[]) {
VMSTATE_UINT32(apicbase, APICCommonState),
static Property apic_properties_common[] = {
DEFINE_PROP_UINT8("id", APICCommonState, id, -1),
- DEFINE_PROP_PTR("cpu_env", APICCommonState, cpu_env),
+ DEFINE_PROP_BIT("vapic", APICCommonState, vapic_control, VAPIC_ENABLE_BIT,
+ true),
DEFINE_PROP_END_OF_LIST(),
};
+static void apic_common_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass);
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->vmsd = &vmstate_apic_common;
+ dc->reset = apic_reset_common;
+ dc->no_user = 1;
+ dc->props = apic_properties_common;
+ sc->init = apic_init_common;
+}
+
+static TypeInfo apic_common_type = {
+ .name = TYPE_APIC_COMMON,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(APICCommonState),
+ .class_size = sizeof(APICCommonClass),
+ .class_init = apic_common_class_init,
+ .abstract = true,
+};
-void apic_qdev_register(APICCommonInfo *info)
+static void register_types(void)
{
- info->busdev.init = apic_init_common;
- info->busdev.qdev.size = sizeof(APICCommonState),
- info->busdev.qdev.vmsd = &vmstate_apic_common;
- info->busdev.qdev.reset = apic_reset_common;
- info->busdev.qdev.no_user = 1;
- info->busdev.qdev.props = apic_properties_common;
- sysbus_register_withprop(&info->busdev);
+ type_register_static(&apic_common_type);
}
+
+type_init(register_types)
projects / qemu.git / blobdiff