#include "qemu/module.h"
#include "hw/arm/xlnx-zynqmp.h"
#include "hw/intc/arm_gic_common.h"
+#include "hw/misc/unimp.h"
#include "hw/boards.h"
#include "sysemu/kvm.h"
#include "sysemu/sysemu.h"
#include "kvm_arm.h"
+#include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
#define GIC_NUM_SPI_INTR 160
#define LQSPI_ADDR 0xc0000000
#define QSPI_IRQ 15
#define QSPI_DMA_ADDR 0xff0f0800
+#define NUM_QSPI_IRQ_LINES 2
+
+#define CRF_ADDR 0xfd1a0000
+#define CRF_IRQ 120
+
+/* Serializer/Deserializer. */
+#define SERDES_ADDR 0xfd400000
+#define SERDES_SIZE 0x20000
#define DP_ADDR 0xfd4a0000
-#define DP_IRQ 113
+#define DP_IRQ 0x77
#define DPDMA_ADDR 0xfd4c0000
-#define DPDMA_IRQ 116
+#define DPDMA_IRQ 0x7a
+
+#define APU_ADDR 0xfd5c0000
+#define APU_IRQ 153
+
+#define TTC0_ADDR 0xFF110000
+#define TTC0_IRQ 36
#define IPI_ADDR 0xFF300000
#define IPI_IRQ 64
#define RTC_ADDR 0xffa60000
#define RTC_IRQ 26
+#define BBRAM_ADDR 0xffcd0000
+#define BBRAM_IRQ 11
+
+#define EFUSE_ADDR 0xffcc0000
+#define EFUSE_IRQ 87
+
#define SDHCI_CAPABILITIES 0x280737ec6481 /* Datasheet: UG1085 (v1.7) */
static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = {
77, 78, 79, 80, 81, 82, 83, 84
};
+static const uint64_t usb_addr[XLNX_ZYNQMP_NUM_USB] = {
+ 0xFE200000, 0xFE300000
+};
+
+static const int usb_intr[XLNX_ZYNQMP_NUM_USB] = {
+ 65, 70
+};
+
typedef struct XlnxZynqMPGICRegion {
int region_index;
uint32_t address;
const char *boot_cpu, Error **errp)
{
int i;
- int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS,
+ int num_rpus = MIN((int)(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS),
XLNX_ZYNQMP_NUM_RPU_CPUS);
if (num_rpus <= 0) {
name = object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i]));
if (strcmp(name, boot_cpu)) {
- /* Secondary CPUs start in PSCI powered-down state */
+ /*
+ * Secondary CPUs start in powered-down state.
+ */
object_property_set_bool(OBJECT(&s->rpu_cpu[i]),
"start-powered-off", true, &error_abort);
} else {
qdev_realize(DEVICE(&s->rpu_cluster), NULL, &error_fatal);
}
+static void xlnx_zynqmp_create_bbram(XlnxZynqMPState *s, qemu_irq *gic)
+{
+ SysBusDevice *sbd;
+
+ object_initialize_child_with_props(OBJECT(s), "bbram", &s->bbram,
+ sizeof(s->bbram), TYPE_XLNX_BBRAM,
+ &error_fatal,
+ "crc-zpads", "1",
+ NULL);
+ sbd = SYS_BUS_DEVICE(&s->bbram);
+
+ sysbus_realize(sbd, &error_fatal);
+ sysbus_mmio_map(sbd, 0, BBRAM_ADDR);
+ sysbus_connect_irq(sbd, 0, gic[BBRAM_IRQ]);
+}
+
+static void xlnx_zynqmp_create_efuse(XlnxZynqMPState *s, qemu_irq *gic)
+{
+ Object *bits = OBJECT(&s->efuse);
+ Object *ctrl = OBJECT(&s->efuse_ctrl);
+ SysBusDevice *sbd;
+
+ object_initialize_child(OBJECT(s), "efuse-ctrl", &s->efuse_ctrl,
+ TYPE_XLNX_ZYNQMP_EFUSE);
+
+ object_initialize_child_with_props(ctrl, "xlnx-efuse@0", bits,
+ sizeof(s->efuse),
+ TYPE_XLNX_EFUSE, &error_abort,
+ "efuse-nr", "3",
+ "efuse-size", "2048",
+ NULL);
+
+ qdev_realize(DEVICE(bits), NULL, &error_abort);
+ object_property_set_link(ctrl, "efuse", bits, &error_abort);
+
+ sbd = SYS_BUS_DEVICE(ctrl);
+ sysbus_realize(sbd, &error_abort);
+ sysbus_mmio_map(sbd, 0, EFUSE_ADDR);
+ sysbus_connect_irq(sbd, 0, gic[EFUSE_IRQ]);
+}
+
+static void xlnx_zynqmp_create_apu_ctrl(XlnxZynqMPState *s, qemu_irq *gic)
+{
+ SysBusDevice *sbd;
+ int i;
+
+ object_initialize_child(OBJECT(s), "apu-ctrl", &s->apu_ctrl,
+ TYPE_XLNX_ZYNQMP_APU_CTRL);
+ sbd = SYS_BUS_DEVICE(&s->apu_ctrl);
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_APU_CPUS; i++) {
+ g_autofree gchar *name = g_strdup_printf("cpu%d", i);
+
+ object_property_set_link(OBJECT(&s->apu_ctrl), name,
+ OBJECT(&s->apu_cpu[i]), &error_abort);
+ }
+
+ sysbus_realize(sbd, &error_fatal);
+ sysbus_mmio_map(sbd, 0, APU_ADDR);
+ sysbus_connect_irq(sbd, 0, gic[APU_IRQ]);
+}
+
+static void xlnx_zynqmp_create_crf(XlnxZynqMPState *s, qemu_irq *gic)
+{
+ SysBusDevice *sbd;
+
+ object_initialize_child(OBJECT(s), "crf", &s->crf, TYPE_XLNX_ZYNQMP_CRF);
+ sbd = SYS_BUS_DEVICE(&s->crf);
+
+ sysbus_realize(sbd, &error_fatal);
+ sysbus_mmio_map(sbd, 0, CRF_ADDR);
+ sysbus_connect_irq(sbd, 0, gic[CRF_IRQ]);
+}
+
+static void xlnx_zynqmp_create_ttc(XlnxZynqMPState *s, qemu_irq *gic)
+{
+ SysBusDevice *sbd;
+ int i, irq;
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_TTC; i++) {
+ object_initialize_child(OBJECT(s), "ttc[*]", &s->ttc[i],
+ TYPE_CADENCE_TTC);
+ sbd = SYS_BUS_DEVICE(&s->ttc[i]);
+
+ sysbus_realize(sbd, &error_fatal);
+ sysbus_mmio_map(sbd, 0, TTC0_ADDR + i * 0x10000);
+ for (irq = 0; irq < 3; irq++) {
+ sysbus_connect_irq(sbd, irq, gic[TTC0_IRQ + i * 3 + irq]);
+ }
+ }
+}
+
+static void xlnx_zynqmp_create_unimp_mmio(XlnxZynqMPState *s)
+{
+ static const struct UnimpInfo {
+ const char *name;
+ hwaddr base;
+ hwaddr size;
+ } unimp_areas[ARRAY_SIZE(s->mr_unimp)] = {
+ { .name = "serdes", SERDES_ADDR, SERDES_SIZE },
+ };
+ unsigned int nr;
+
+ for (nr = 0; nr < ARRAY_SIZE(unimp_areas); nr++) {
+ const struct UnimpInfo *info = &unimp_areas[nr];
+ DeviceState *dev = qdev_new(TYPE_UNIMPLEMENTED_DEVICE);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+
+ assert(info->name && info->base && info->size > 0);
+ qdev_prop_set_string(dev, "name", info->name);
+ qdev_prop_set_uint64(dev, "size", info->size);
+ object_property_add_child(OBJECT(s), info->name, OBJECT(dev));
+
+ sysbus_realize_and_unref(sbd, &error_fatal);
+ sysbus_mmio_map(sbd, 0, info->base);
+ }
+}
+
static void xlnx_zynqmp_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
}
object_initialize_child(obj, "qspi-dma", &s->qspi_dma, TYPE_XLNX_CSU_DMA);
+ object_initialize_child(obj, "qspi-irq-orgate",
+ &s->qspi_irq_orgate, TYPE_OR_IRQ);
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_USB; i++) {
+ object_initialize_child(obj, "usb[*]", &s->usb[i], TYPE_USB_DWC3);
+ }
}
static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
for (i = 0; i < num_apus; i++) {
const char *name;
- object_property_set_int(OBJECT(&s->apu_cpu[i]), "psci-conduit",
- QEMU_PSCI_CONDUIT_SMC, &error_abort);
-
name = object_get_canonical_path_component(OBJECT(&s->apu_cpu[i]));
if (strcmp(name, boot_cpu)) {
- /* Secondary CPUs start in PSCI powered-down state */
+ /*
+ * Secondary CPUs start in powered-down state.
+ */
object_property_set_bool(OBJECT(&s->apu_cpu[i]),
"start-powered-off", true, &error_abort);
} else {
g_free(bus_name);
}
- if (!sysbus_realize(SYS_BUS_DEVICE(&s->qspi), errp)) {
- return;
- }
- sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 0, QSPI_ADDR);
- sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 1, LQSPI_ADDR);
- sysbus_connect_irq(SYS_BUS_DEVICE(&s->qspi), 0, gic_spi[QSPI_IRQ]);
-
- for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_BUS; i++) {
- gchar *bus_name;
- gchar *target_bus;
-
- /* Alias controller SPI bus to the SoC itself */
- bus_name = g_strdup_printf("qspi%d", i);
- target_bus = g_strdup_printf("spi%d", i);
- object_property_add_alias(OBJECT(s), bus_name,
- OBJECT(&s->qspi), target_bus);
- g_free(bus_name);
- g_free(target_bus);
- }
-
if (!sysbus_realize(SYS_BUS_DEVICE(&s->dp), errp)) {
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);
+ xlnx_zynqmp_create_bbram(s, gic_spi);
+ xlnx_zynqmp_create_efuse(s, gic_spi);
+ xlnx_zynqmp_create_apu_ctrl(s, gic_spi);
+ xlnx_zynqmp_create_crf(s, gic_spi);
+ xlnx_zynqmp_create_ttc(s, gic_spi);
+ xlnx_zynqmp_create_unimp_mmio(s);
+
for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {
if (!object_property_set_uint(OBJECT(&s->gdma[i]), "bus-width", 128,
errp)) {
return;
}
+ if (!object_property_set_link(OBJECT(&s->gdma[i]), "dma",
+ OBJECT(system_memory), errp)) {
+ return;
+ }
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gdma[i]), errp)) {
return;
}
}
for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {
+ if (!object_property_set_link(OBJECT(&s->adma[i]), "dma",
+ OBJECT(system_memory), errp)) {
+ return;
+ }
if (!sysbus_realize(SYS_BUS_DEVICE(&s->adma[i]), errp)) {
return;
}
gic_spi[adma_ch_intr[i]]);
}
+ object_property_set_int(OBJECT(&s->qspi_irq_orgate),
+ "num-lines", NUM_QSPI_IRQ_LINES, &error_fatal);
+ qdev_realize(DEVICE(&s->qspi_irq_orgate), NULL, &error_fatal);
+ qdev_connect_gpio_out(DEVICE(&s->qspi_irq_orgate), 0, gic_spi[QSPI_IRQ]);
+
+ if (!object_property_set_link(OBJECT(&s->qspi_dma), "dma",
+ OBJECT(system_memory), errp)) {
+ return;
+ }
if (!sysbus_realize(SYS_BUS_DEVICE(&s->qspi_dma), errp)) {
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi_dma), 0, QSPI_DMA_ADDR);
- sysbus_connect_irq(SYS_BUS_DEVICE(&s->qspi_dma), 0, gic_spi[QSPI_IRQ]);
- object_property_set_link(OBJECT(&s->qspi), "stream-connected-dma",
- OBJECT(&s->qspi_dma), errp);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->qspi_dma), 0,
+ qdev_get_gpio_in(DEVICE(&s->qspi_irq_orgate), 0));
+
+ if (!object_property_set_link(OBJECT(&s->qspi), "stream-connected-dma",
+ OBJECT(&s->qspi_dma), errp)) {
+ return;
+ }
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->qspi), errp)) {
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 0, QSPI_ADDR);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 1, LQSPI_ADDR);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->qspi), 0,
+ qdev_get_gpio_in(DEVICE(&s->qspi_irq_orgate), 1));
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_BUS; i++) {
+ g_autofree gchar *bus_name = g_strdup_printf("qspi%d", i);
+ g_autofree gchar *target_bus = g_strdup_printf("spi%d", i);
+
+ /* Alias controller SPI bus to the SoC itself */
+ object_property_add_alias(OBJECT(s), bus_name,
+ OBJECT(&s->qspi), target_bus);
+ }
+
+ for (i = 0; i < XLNX_ZYNQMP_NUM_USB; i++) {
+ if (!object_property_set_link(OBJECT(&s->usb[i].sysbus_xhci), "dma",
+ OBJECT(system_memory), errp)) {
+ return;
+ }
+
+ qdev_prop_set_uint32(DEVICE(&s->usb[i].sysbus_xhci), "intrs", 4);
+ qdev_prop_set_uint32(DEVICE(&s->usb[i].sysbus_xhci), "slots", 2);
+
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->usb[i]), errp)) {
+ return;
+ }
+
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, usb_addr[i]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i].sysbus_xhci), 0,
+ gic_spi[usb_intr[i]]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i].sysbus_xhci), 1,
+ gic_spi[usb_intr[i] + 1]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i].sysbus_xhci), 2,
+ gic_spi[usb_intr[i] + 2]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i].sysbus_xhci), 3,
+ gic_spi[usb_intr[i] + 3]);
+ }
}
static Property xlnx_zynqmp_props[] = {