Move Arm A-class Generic Timer definitions to the new
"target/arm/gtimer.h" header so units in hw/ which don't
need access to ARMCPU internals can use them without
having to include the huge "cpu.h".
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20240118200643.29037-20-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
#include "sysemu/sysemu.h"
#include "hw/arm/allwinner-h3.h"
#include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
/* Memory map */
const hwaddr allwinner_h3_memmap[] = {
#include "hw/arm/allwinner-r40.h"
#include "hw/misc/allwinner-r40-dramc.h"
#include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
/* Memory map */
const hwaddr allwinner_r40_memmap[] = {
#include "hw/arm/raspi_platform.h"
#include "hw/sysbus.h"
#include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
struct BCM283XClass {
/*< private >*/
#include "qapi/qmp/qlist.h"
#include "qom/object.h"
#include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
#define RAMLIMIT_GB 8192
#define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB)
#include "target/arm/cpu-qom.h"
#include "target/arm/internals.h"
#include "target/arm/multiprocessing.h"
+#include "target/arm/gtimer.h"
#include "hw/mem/pc-dimm.h"
#include "hw/mem/nvdimm.h"
#include "hw/acpi/generic_event_device.h"
#include "hw/arm/xlnx-versal.h"
#include "qemu/log.h"
#include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
#include "sysemu/sysemu.h"
#include "kvm_arm.h"
#include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
#define GIC_NUM_SPI_INTR 160
#include "hw/qdev-properties.h"
#include "sysemu/kvm.h"
#include "kvm_arm.h"
+#include "target/arm/gtimer.h"
static void a15mp_priv_set_irq(void *opaque, int irq, int level)
{
#include "fpu/softfloat.h"
#include "cpregs.h"
#include "target/arm/cpu-qom.h"
+#include "target/arm/gtimer.h"
static void arm_cpu_set_pc(CPUState *cs, vaddr value)
{
#include "exec/cpu-defs.h"
#include "qapi/qapi-types-common.h"
#include "target/arm/multiprocessing.h"
+#include "target/arm/gtimer.h"
/* ARM processors have a weak memory model */
#define TCG_GUEST_DEFAULT_MO (0)
uint64_t ctl; /* Timer Control register */
} ARMGenericTimer;
-#define GTIMER_PHYS 0
-#define GTIMER_VIRT 1
-#define GTIMER_HYP 2
-#define GTIMER_SEC 3
-#define GTIMER_HYPVIRT 4
-#define NUM_GTIMERS 5
-
#define VTCR_NSW (1u << 29)
#define VTCR_NSA (1u << 30)
#define VSTCR_SW VTCR_NSW
--- /dev/null
+/*
+ * ARM generic timer definitions for Arm A-class CPU
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#ifndef TARGET_ARM_GTIMER_H
+#define TARGET_ARM_GTIMER_H
+
+enum {
+ GTIMER_PHYS = 0,
+ GTIMER_VIRT = 1,
+ GTIMER_HYP = 2,
+ GTIMER_SEC = 3,
+ GTIMER_HYPVIRT = 4,
+#define NUM_GTIMERS 5
+};
+
+#endif
#include "semihosting/common-semi.h"
#endif
#include "cpregs.h"
+#include "target/arm/gtimer.h"
#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
#include "target/arm/cpu.h"
#include "target/arm/internals.h"
#include "target/arm/multiprocessing.h"
+#include "target/arm/gtimer.h"
#include "trace/trace-target_arm_hvf.h"
#include "migration/vmstate.h"
#include "qemu/log.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi/ghes.h"
+#include "target/arm/gtimer.h"
const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
KVM_CAP_LAST_INFO
#include "internals.h"
#include "cpu-features.h"
#include "migration/cpu.h"
+#include "target/arm/gtimer.h"
static bool vfp_needed(void *opaque)
{