2 * Xilinx Versal SoC model.
4 * Copyright (c) 2018 Xilinx Inc.
5 * Written by Edgar E. Iglesias
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 or
9 * (at your option) any later version.
12 #include "qemu/osdep.h"
13 #include "qemu/units.h"
14 #include "qapi/error.h"
15 #include "qapi/qmp/qlist.h"
16 #include "qemu/module.h"
17 #include "hw/sysbus.h"
19 #include "sysemu/sysemu.h"
20 #include "sysemu/kvm.h"
21 #include "hw/arm/boot.h"
23 #include "hw/misc/unimp.h"
24 #include "hw/arm/xlnx-versal.h"
26 #include "target/arm/cpu-qom.h"
27 #include "target/arm/gtimer.h"
29 #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
30 #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
31 #define GEM_REVISION 0x40070106
33 #define VERSAL_NUM_PMC_APB_IRQS 18
34 #define NUM_OSPI_IRQ_LINES 3
36 static void versal_create_apu_cpus(Versal
*s
)
40 object_initialize_child(OBJECT(s
), "apu-cluster", &s
->fpd
.apu
.cluster
,
42 qdev_prop_set_uint32(DEVICE(&s
->fpd
.apu
.cluster
), "cluster-id", 0);
44 for (i
= 0; i
< ARRAY_SIZE(s
->fpd
.apu
.cpu
); i
++) {
47 object_initialize_child(OBJECT(&s
->fpd
.apu
.cluster
),
48 "apu-cpu[*]", &s
->fpd
.apu
.cpu
[i
],
49 XLNX_VERSAL_ACPU_TYPE
);
50 obj
= OBJECT(&s
->fpd
.apu
.cpu
[i
]);
52 /* Secondary CPUs start in powered-down state */
53 object_property_set_bool(obj
, "start-powered-off", true,
57 object_property_set_int(obj
, "core-count", ARRAY_SIZE(s
->fpd
.apu
.cpu
),
59 object_property_set_link(obj
, "memory", OBJECT(&s
->fpd
.apu
.mr
),
61 qdev_realize(DEVICE(obj
), NULL
, &error_fatal
);
64 qdev_realize(DEVICE(&s
->fpd
.apu
.cluster
), NULL
, &error_fatal
);
67 static void versal_create_apu_gic(Versal
*s
, qemu_irq
*pic
)
69 static const uint64_t addrs
[] = {
73 SysBusDevice
*gicbusdev
;
75 QList
*redist_region_count
;
76 int nr_apu_cpus
= ARRAY_SIZE(s
->fpd
.apu
.cpu
);
79 object_initialize_child(OBJECT(s
), "apu-gic", &s
->fpd
.apu
.gic
,
81 gicbusdev
= SYS_BUS_DEVICE(&s
->fpd
.apu
.gic
);
82 gicdev
= DEVICE(&s
->fpd
.apu
.gic
);
83 qdev_prop_set_uint32(gicdev
, "revision", 3);
84 qdev_prop_set_uint32(gicdev
, "num-cpu", nr_apu_cpus
);
85 qdev_prop_set_uint32(gicdev
, "num-irq", XLNX_VERSAL_NR_IRQS
+ 32);
87 redist_region_count
= qlist_new();
88 qlist_append_int(redist_region_count
, nr_apu_cpus
);
89 qdev_prop_set_array(gicdev
, "redist-region-count", redist_region_count
);
91 qdev_prop_set_bit(gicdev
, "has-security-extensions", true);
93 sysbus_realize(SYS_BUS_DEVICE(&s
->fpd
.apu
.gic
), &error_fatal
);
95 for (i
= 0; i
< ARRAY_SIZE(addrs
); i
++) {
98 mr
= sysbus_mmio_get_region(gicbusdev
, i
);
99 memory_region_add_subregion(&s
->fpd
.apu
.mr
, addrs
[i
], mr
);
102 for (i
= 0; i
< nr_apu_cpus
; i
++) {
103 DeviceState
*cpudev
= DEVICE(&s
->fpd
.apu
.cpu
[i
]);
104 int ppibase
= XLNX_VERSAL_NR_IRQS
+ i
* GIC_INTERNAL
+ GIC_NR_SGIS
;
107 /* Mapping from the output timer irq lines from the CPU to the
110 const int timer_irq
[] = {
111 [GTIMER_PHYS
] = VERSAL_TIMER_NS_EL1_IRQ
,
112 [GTIMER_VIRT
] = VERSAL_TIMER_VIRT_IRQ
,
113 [GTIMER_HYP
] = VERSAL_TIMER_NS_EL2_IRQ
,
114 [GTIMER_SEC
] = VERSAL_TIMER_S_EL1_IRQ
,
117 for (ti
= 0; ti
< ARRAY_SIZE(timer_irq
); ti
++) {
118 qdev_connect_gpio_out(cpudev
, ti
,
119 qdev_get_gpio_in(gicdev
,
120 ppibase
+ timer_irq
[ti
]));
122 maint_irq
= qdev_get_gpio_in(gicdev
,
123 ppibase
+ VERSAL_GIC_MAINT_IRQ
);
124 qdev_connect_gpio_out_named(cpudev
, "gicv3-maintenance-interrupt",
126 sysbus_connect_irq(gicbusdev
, i
, qdev_get_gpio_in(cpudev
, ARM_CPU_IRQ
));
127 sysbus_connect_irq(gicbusdev
, i
+ nr_apu_cpus
,
128 qdev_get_gpio_in(cpudev
, ARM_CPU_FIQ
));
129 sysbus_connect_irq(gicbusdev
, i
+ 2 * nr_apu_cpus
,
130 qdev_get_gpio_in(cpudev
, ARM_CPU_VIRQ
));
131 sysbus_connect_irq(gicbusdev
, i
+ 3 * nr_apu_cpus
,
132 qdev_get_gpio_in(cpudev
, ARM_CPU_VFIQ
));
135 for (i
= 0; i
< XLNX_VERSAL_NR_IRQS
; i
++) {
136 pic
[i
] = qdev_get_gpio_in(gicdev
, i
);
140 static void versal_create_rpu_cpus(Versal
*s
)
144 object_initialize_child(OBJECT(s
), "rpu-cluster", &s
->lpd
.rpu
.cluster
,
146 qdev_prop_set_uint32(DEVICE(&s
->lpd
.rpu
.cluster
), "cluster-id", 1);
148 for (i
= 0; i
< ARRAY_SIZE(s
->lpd
.rpu
.cpu
); i
++) {
151 object_initialize_child(OBJECT(&s
->lpd
.rpu
.cluster
),
152 "rpu-cpu[*]", &s
->lpd
.rpu
.cpu
[i
],
153 XLNX_VERSAL_RCPU_TYPE
);
154 obj
= OBJECT(&s
->lpd
.rpu
.cpu
[i
]);
155 object_property_set_bool(obj
, "start-powered-off", true,
158 object_property_set_int(obj
, "mp-affinity", 0x100 | i
, &error_abort
);
159 object_property_set_int(obj
, "core-count", ARRAY_SIZE(s
->lpd
.rpu
.cpu
),
161 object_property_set_link(obj
, "memory", OBJECT(&s
->lpd
.rpu
.mr
),
163 qdev_realize(DEVICE(obj
), NULL
, &error_fatal
);
166 qdev_realize(DEVICE(&s
->lpd
.rpu
.cluster
), NULL
, &error_fatal
);
169 static void versal_create_uarts(Versal
*s
, qemu_irq
*pic
)
173 for (i
= 0; i
< ARRAY_SIZE(s
->lpd
.iou
.uart
); i
++) {
174 static const int irqs
[] = { VERSAL_UART0_IRQ_0
, VERSAL_UART1_IRQ_0
};
175 static const uint64_t addrs
[] = { MM_UART0
, MM_UART1
};
176 char *name
= g_strdup_printf("uart%d", i
);
180 object_initialize_child(OBJECT(s
), name
, &s
->lpd
.iou
.uart
[i
],
182 dev
= DEVICE(&s
->lpd
.iou
.uart
[i
]);
183 qdev_prop_set_chr(dev
, "chardev", serial_hd(i
));
184 sysbus_realize(SYS_BUS_DEVICE(dev
), &error_fatal
);
186 mr
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 0);
187 memory_region_add_subregion(&s
->mr_ps
, addrs
[i
], mr
);
189 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, pic
[irqs
[i
]]);
194 static void versal_create_canfds(Versal
*s
, qemu_irq
*pic
)
197 uint32_t irqs
[] = { VERSAL_CANFD0_IRQ_0
, VERSAL_CANFD1_IRQ_0
};
198 uint64_t addrs
[] = { MM_CANFD0
, MM_CANFD1
};
200 for (i
= 0; i
< ARRAY_SIZE(s
->lpd
.iou
.canfd
); i
++) {
201 char *name
= g_strdup_printf("canfd%d", i
);
205 object_initialize_child(OBJECT(s
), name
, &s
->lpd
.iou
.canfd
[i
],
207 sbd
= SYS_BUS_DEVICE(&s
->lpd
.iou
.canfd
[i
]);
209 object_property_set_int(OBJECT(&s
->lpd
.iou
.canfd
[i
]), "ext_clk_freq",
210 XLNX_VERSAL_CANFD_REF_CLK
, &error_abort
);
212 object_property_set_link(OBJECT(&s
->lpd
.iou
.canfd
[i
]), "canfdbus",
213 OBJECT(s
->lpd
.iou
.canbus
[i
]),
216 sysbus_realize(sbd
, &error_fatal
);
218 mr
= sysbus_mmio_get_region(sbd
, 0);
219 memory_region_add_subregion(&s
->mr_ps
, addrs
[i
], mr
);
221 sysbus_connect_irq(sbd
, 0, pic
[irqs
[i
]]);
226 static void versal_create_usbs(Versal
*s
, qemu_irq
*pic
)
231 object_initialize_child(OBJECT(s
), "usb2", &s
->lpd
.iou
.usb
,
232 TYPE_XILINX_VERSAL_USB2
);
233 dev
= DEVICE(&s
->lpd
.iou
.usb
);
235 object_property_set_link(OBJECT(dev
), "dma", OBJECT(&s
->mr_ps
),
237 qdev_prop_set_uint32(dev
, "intrs", 1);
238 qdev_prop_set_uint32(dev
, "slots", 2);
240 sysbus_realize(SYS_BUS_DEVICE(dev
), &error_fatal
);
242 mr
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 0);
243 memory_region_add_subregion(&s
->mr_ps
, MM_USB_0
, mr
);
245 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, pic
[VERSAL_USB0_IRQ_0
]);
247 mr
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 1);
248 memory_region_add_subregion(&s
->mr_ps
, MM_USB2_CTRL_REGS
, mr
);
251 static void versal_create_gems(Versal
*s
, qemu_irq
*pic
)
255 for (i
= 0; i
< ARRAY_SIZE(s
->lpd
.iou
.gem
); i
++) {
256 static const int irqs
[] = { VERSAL_GEM0_IRQ_0
, VERSAL_GEM1_IRQ_0
};
257 static const uint64_t addrs
[] = { MM_GEM0
, MM_GEM1
};
258 char *name
= g_strdup_printf("gem%d", i
);
259 NICInfo
*nd
= &nd_table
[i
];
263 object_initialize_child(OBJECT(s
), name
, &s
->lpd
.iou
.gem
[i
],
265 dev
= DEVICE(&s
->lpd
.iou
.gem
[i
]);
266 /* FIXME use qdev NIC properties instead of nd_table[] */
268 qemu_check_nic_model(nd
, "cadence_gem");
269 qdev_set_nic_properties(dev
, nd
);
271 object_property_set_int(OBJECT(dev
), "phy-addr", 23, &error_abort
);
272 object_property_set_int(OBJECT(dev
), "num-priority-queues", 2,
274 object_property_set_link(OBJECT(dev
), "dma", OBJECT(&s
->mr_ps
),
276 sysbus_realize(SYS_BUS_DEVICE(dev
), &error_fatal
);
278 mr
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 0);
279 memory_region_add_subregion(&s
->mr_ps
, addrs
[i
], mr
);
281 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, pic
[irqs
[i
]]);
286 static void versal_create_admas(Versal
*s
, qemu_irq
*pic
)
290 for (i
= 0; i
< ARRAY_SIZE(s
->lpd
.iou
.adma
); i
++) {
291 char *name
= g_strdup_printf("adma%d", i
);
295 object_initialize_child(OBJECT(s
), name
, &s
->lpd
.iou
.adma
[i
],
297 dev
= DEVICE(&s
->lpd
.iou
.adma
[i
]);
298 object_property_set_int(OBJECT(dev
), "bus-width", 128, &error_abort
);
299 object_property_set_link(OBJECT(dev
), "dma",
300 OBJECT(get_system_memory()), &error_fatal
);
301 sysbus_realize(SYS_BUS_DEVICE(dev
), &error_fatal
);
303 mr
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 0);
304 memory_region_add_subregion(&s
->mr_ps
,
305 MM_ADMA_CH0
+ i
* MM_ADMA_CH0_SIZE
, mr
);
307 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, pic
[VERSAL_ADMA_IRQ_0
+ i
]);
312 #define SDHCI_CAPABILITIES 0x280737ec6481 /* Same as on ZynqMP. */
313 static void versal_create_sds(Versal
*s
, qemu_irq
*pic
)
317 for (i
= 0; i
< ARRAY_SIZE(s
->pmc
.iou
.sd
); i
++) {
321 object_initialize_child(OBJECT(s
), "sd[*]", &s
->pmc
.iou
.sd
[i
],
323 dev
= DEVICE(&s
->pmc
.iou
.sd
[i
]);
325 object_property_set_uint(OBJECT(dev
), "sd-spec-version", 3,
327 object_property_set_uint(OBJECT(dev
), "capareg", SDHCI_CAPABILITIES
,
329 object_property_set_uint(OBJECT(dev
), "uhs", UHS_I
, &error_fatal
);
330 sysbus_realize(SYS_BUS_DEVICE(dev
), &error_fatal
);
332 mr
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 0);
333 memory_region_add_subregion(&s
->mr_ps
,
334 MM_PMC_SD0
+ i
* MM_PMC_SD0_SIZE
, mr
);
336 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0,
337 pic
[VERSAL_SD0_IRQ_0
+ i
* 2]);
341 static void versal_create_pmc_apb_irq_orgate(Versal
*s
, qemu_irq
*pic
)
346 * The VERSAL_PMC_APB_IRQ is an 'or' of the interrupts from the following
351 * - CFRAME regs (input 3 - 17 to the orgate)
353 object_initialize_child(OBJECT(s
), "pmc-apb-irq-orgate",
354 &s
->pmc
.apb_irq_orgate
, TYPE_OR_IRQ
);
355 orgate
= DEVICE(&s
->pmc
.apb_irq_orgate
);
356 object_property_set_int(OBJECT(orgate
),
357 "num-lines", VERSAL_NUM_PMC_APB_IRQS
, &error_fatal
);
358 qdev_realize(orgate
, NULL
, &error_fatal
);
359 qdev_connect_gpio_out(orgate
, 0, pic
[VERSAL_PMC_APB_IRQ
]);
362 static void versal_create_rtc(Versal
*s
, qemu_irq
*pic
)
367 object_initialize_child(OBJECT(s
), "rtc", &s
->pmc
.rtc
,
368 TYPE_XLNX_ZYNQMP_RTC
);
369 sbd
= SYS_BUS_DEVICE(&s
->pmc
.rtc
);
370 sysbus_realize(sbd
, &error_fatal
);
372 mr
= sysbus_mmio_get_region(sbd
, 0);
373 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_RTC
, mr
);
376 * TODO: Connect the ALARM and SECONDS interrupts once our RTC model
379 sysbus_connect_irq(sbd
, 1,
380 qdev_get_gpio_in(DEVICE(&s
->pmc
.apb_irq_orgate
), 0));
383 static void versal_create_trng(Versal
*s
, qemu_irq
*pic
)
388 object_initialize_child(OBJECT(s
), "trng", &s
->pmc
.trng
,
389 TYPE_XLNX_VERSAL_TRNG
);
390 sbd
= SYS_BUS_DEVICE(&s
->pmc
.trng
);
391 sysbus_realize(sbd
, &error_fatal
);
393 mr
= sysbus_mmio_get_region(sbd
, 0);
394 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_TRNG
, mr
);
395 sysbus_connect_irq(sbd
, 0, pic
[VERSAL_TRNG_IRQ
]);
398 static void versal_create_xrams(Versal
*s
, qemu_irq
*pic
)
400 int nr_xrams
= ARRAY_SIZE(s
->lpd
.xram
.ctrl
);
404 /* XRAM IRQs get ORed into a single line. */
405 object_initialize_child(OBJECT(s
), "xram-irq-orgate",
406 &s
->lpd
.xram
.irq_orgate
, TYPE_OR_IRQ
);
407 orgate
= DEVICE(&s
->lpd
.xram
.irq_orgate
);
408 object_property_set_int(OBJECT(orgate
),
409 "num-lines", nr_xrams
, &error_fatal
);
410 qdev_realize(orgate
, NULL
, &error_fatal
);
411 qdev_connect_gpio_out(orgate
, 0, pic
[VERSAL_XRAM_IRQ_0
]);
413 for (i
= 0; i
< ARRAY_SIZE(s
->lpd
.xram
.ctrl
); i
++) {
417 object_initialize_child(OBJECT(s
), "xram[*]", &s
->lpd
.xram
.ctrl
[i
],
418 TYPE_XLNX_XRAM_CTRL
);
419 sbd
= SYS_BUS_DEVICE(&s
->lpd
.xram
.ctrl
[i
]);
420 sysbus_realize(sbd
, &error_fatal
);
422 mr
= sysbus_mmio_get_region(sbd
, 0);
423 memory_region_add_subregion(&s
->mr_ps
,
424 MM_XRAMC
+ i
* MM_XRAMC_SIZE
, mr
);
425 mr
= sysbus_mmio_get_region(sbd
, 1);
426 memory_region_add_subregion(&s
->mr_ps
, MM_XRAM
+ i
* MiB
, mr
);
428 sysbus_connect_irq(sbd
, 0, qdev_get_gpio_in(orgate
, i
));
432 static void versal_create_bbram(Versal
*s
, qemu_irq
*pic
)
436 object_initialize_child_with_props(OBJECT(s
), "bbram", &s
->pmc
.bbram
,
437 sizeof(s
->pmc
.bbram
), TYPE_XLNX_BBRAM
,
441 sbd
= SYS_BUS_DEVICE(&s
->pmc
.bbram
);
443 sysbus_realize(sbd
, &error_fatal
);
444 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_BBRAM_CTRL
,
445 sysbus_mmio_get_region(sbd
, 0));
446 sysbus_connect_irq(sbd
, 0,
447 qdev_get_gpio_in(DEVICE(&s
->pmc
.apb_irq_orgate
), 1));
450 static void versal_realize_efuse_part(Versal
*s
, Object
*dev
, hwaddr base
)
452 SysBusDevice
*part
= SYS_BUS_DEVICE(dev
);
454 object_property_set_link(OBJECT(part
), "efuse",
455 OBJECT(&s
->pmc
.efuse
), &error_abort
);
457 sysbus_realize(part
, &error_abort
);
458 memory_region_add_subregion(&s
->mr_ps
, base
,
459 sysbus_mmio_get_region(part
, 0));
462 static void versal_create_efuse(Versal
*s
, qemu_irq
*pic
)
464 Object
*bits
= OBJECT(&s
->pmc
.efuse
);
465 Object
*ctrl
= OBJECT(&s
->pmc
.efuse_ctrl
);
466 Object
*cache
= OBJECT(&s
->pmc
.efuse_cache
);
468 object_initialize_child(OBJECT(s
), "efuse-ctrl", &s
->pmc
.efuse_ctrl
,
469 TYPE_XLNX_VERSAL_EFUSE_CTRL
);
471 object_initialize_child(OBJECT(s
), "efuse-cache", &s
->pmc
.efuse_cache
,
472 TYPE_XLNX_VERSAL_EFUSE_CACHE
);
474 object_initialize_child_with_props(ctrl
, "xlnx-efuse@0", bits
,
475 sizeof(s
->pmc
.efuse
),
476 TYPE_XLNX_EFUSE
, &error_abort
,
478 "efuse-size", "8192",
481 qdev_realize(DEVICE(bits
), NULL
, &error_abort
);
482 versal_realize_efuse_part(s
, ctrl
, MM_PMC_EFUSE_CTRL
);
483 versal_realize_efuse_part(s
, cache
, MM_PMC_EFUSE_CACHE
);
485 sysbus_connect_irq(SYS_BUS_DEVICE(ctrl
), 0, pic
[VERSAL_EFUSE_IRQ
]);
488 static void versal_create_pmc_iou_slcr(Versal
*s
, qemu_irq
*pic
)
492 object_initialize_child(OBJECT(s
), "versal-pmc-iou-slcr", &s
->pmc
.iou
.slcr
,
493 TYPE_XILINX_VERSAL_PMC_IOU_SLCR
);
495 sbd
= SYS_BUS_DEVICE(&s
->pmc
.iou
.slcr
);
496 sysbus_realize(sbd
, &error_fatal
);
498 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_PMC_IOU_SLCR
,
499 sysbus_mmio_get_region(sbd
, 0));
501 sysbus_connect_irq(sbd
, 0,
502 qdev_get_gpio_in(DEVICE(&s
->pmc
.apb_irq_orgate
), 2));
505 static void versal_create_ospi(Versal
*s
, qemu_irq
*pic
)
508 MemoryRegion
*mr_dac
;
509 qemu_irq ospi_mux_sel
;
512 memory_region_init(&s
->pmc
.iou
.ospi
.linear_mr
, OBJECT(s
),
513 "versal-ospi-linear-mr" , MM_PMC_OSPI_DAC_SIZE
);
515 object_initialize_child(OBJECT(s
), "versal-ospi", &s
->pmc
.iou
.ospi
.ospi
,
516 TYPE_XILINX_VERSAL_OSPI
);
518 mr_dac
= sysbus_mmio_get_region(SYS_BUS_DEVICE(&s
->pmc
.iou
.ospi
.ospi
), 1);
519 memory_region_add_subregion(&s
->pmc
.iou
.ospi
.linear_mr
, 0x0, mr_dac
);
521 /* Create the OSPI destination DMA */
522 object_initialize_child(OBJECT(s
), "versal-ospi-dma-dst",
523 &s
->pmc
.iou
.ospi
.dma_dst
,
526 object_property_set_link(OBJECT(&s
->pmc
.iou
.ospi
.dma_dst
),
527 "dma", OBJECT(get_system_memory()),
530 sbd
= SYS_BUS_DEVICE(&s
->pmc
.iou
.ospi
.dma_dst
);
531 sysbus_realize(sbd
, &error_fatal
);
533 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_OSPI_DMA_DST
,
534 sysbus_mmio_get_region(sbd
, 0));
536 /* Create the OSPI source DMA */
537 object_initialize_child(OBJECT(s
), "versal-ospi-dma-src",
538 &s
->pmc
.iou
.ospi
.dma_src
,
541 object_property_set_bool(OBJECT(&s
->pmc
.iou
.ospi
.dma_src
), "is-dst",
542 false, &error_abort
);
544 object_property_set_link(OBJECT(&s
->pmc
.iou
.ospi
.dma_src
),
545 "dma", OBJECT(mr_dac
), &error_abort
);
547 object_property_set_link(OBJECT(&s
->pmc
.iou
.ospi
.dma_src
),
548 "stream-connected-dma",
549 OBJECT(&s
->pmc
.iou
.ospi
.dma_dst
),
552 sbd
= SYS_BUS_DEVICE(&s
->pmc
.iou
.ospi
.dma_src
);
553 sysbus_realize(sbd
, &error_fatal
);
555 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_OSPI_DMA_SRC
,
556 sysbus_mmio_get_region(sbd
, 0));
558 /* Realize the OSPI */
559 object_property_set_link(OBJECT(&s
->pmc
.iou
.ospi
.ospi
), "dma-src",
560 OBJECT(&s
->pmc
.iou
.ospi
.dma_src
), &error_abort
);
562 sbd
= SYS_BUS_DEVICE(&s
->pmc
.iou
.ospi
.ospi
);
563 sysbus_realize(sbd
, &error_fatal
);
565 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_OSPI
,
566 sysbus_mmio_get_region(sbd
, 0));
568 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_OSPI_DAC
,
569 &s
->pmc
.iou
.ospi
.linear_mr
);
572 ospi_mux_sel
= qdev_get_gpio_in_named(DEVICE(&s
->pmc
.iou
.ospi
.ospi
),
574 qdev_connect_gpio_out_named(DEVICE(&s
->pmc
.iou
.slcr
), "ospi-mux-sel", 0,
578 object_initialize_child(OBJECT(s
), "ospi-irq-orgate",
579 &s
->pmc
.iou
.ospi
.irq_orgate
, TYPE_OR_IRQ
);
580 object_property_set_int(OBJECT(&s
->pmc
.iou
.ospi
.irq_orgate
),
581 "num-lines", NUM_OSPI_IRQ_LINES
, &error_fatal
);
583 orgate
= DEVICE(&s
->pmc
.iou
.ospi
.irq_orgate
);
584 qdev_realize(orgate
, NULL
, &error_fatal
);
586 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->pmc
.iou
.ospi
.ospi
), 0,
587 qdev_get_gpio_in(orgate
, 0));
588 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->pmc
.iou
.ospi
.dma_src
), 0,
589 qdev_get_gpio_in(orgate
, 1));
590 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->pmc
.iou
.ospi
.dma_dst
), 0,
591 qdev_get_gpio_in(orgate
, 2));
593 qdev_connect_gpio_out(orgate
, 0, pic
[VERSAL_OSPI_IRQ
]);
596 static void versal_create_cfu(Versal
*s
, qemu_irq
*pic
)
605 { MM_PMC_CFRAME0_REG
, MM_PMC_CFRAME0_FDRI
},
606 { MM_PMC_CFRAME1_REG
, MM_PMC_CFRAME1_FDRI
},
607 { MM_PMC_CFRAME2_REG
, MM_PMC_CFRAME2_FDRI
},
608 { MM_PMC_CFRAME3_REG
, MM_PMC_CFRAME3_FDRI
},
609 { MM_PMC_CFRAME4_REG
, MM_PMC_CFRAME4_FDRI
},
610 { MM_PMC_CFRAME5_REG
, MM_PMC_CFRAME5_FDRI
},
611 { MM_PMC_CFRAME6_REG
, MM_PMC_CFRAME6_FDRI
},
612 { MM_PMC_CFRAME7_REG
, MM_PMC_CFRAME7_FDRI
},
613 { MM_PMC_CFRAME8_REG
, MM_PMC_CFRAME8_FDRI
},
614 { MM_PMC_CFRAME9_REG
, MM_PMC_CFRAME9_FDRI
},
615 { MM_PMC_CFRAME10_REG
, MM_PMC_CFRAME10_FDRI
},
616 { MM_PMC_CFRAME11_REG
, MM_PMC_CFRAME11_FDRI
},
617 { MM_PMC_CFRAME12_REG
, MM_PMC_CFRAME12_FDRI
},
618 { MM_PMC_CFRAME13_REG
, MM_PMC_CFRAME13_FDRI
},
619 { MM_PMC_CFRAME14_REG
, MM_PMC_CFRAME14_FDRI
},
622 uint32_t blktype0_frames
;
623 uint32_t blktype1_frames
;
624 uint32_t blktype2_frames
;
625 uint32_t blktype3_frames
;
626 uint32_t blktype4_frames
;
627 uint32_t blktype5_frames
;
628 uint32_t blktype6_frames
;
630 [0] = { 34111, 3528, 12800, 11, 5, 1, 1 },
631 [1] = { 38498, 3841, 15361, 13, 7, 3, 1 },
632 [2] = { 38498, 3841, 15361, 13, 7, 3, 1 },
633 [3] = { 38498, 3841, 15361, 13, 7, 3, 1 },
637 object_initialize_child(OBJECT(s
), "cfu-fdro", &s
->pmc
.cfu_fdro
,
638 TYPE_XLNX_VERSAL_CFU_FDRO
);
639 sbd
= SYS_BUS_DEVICE(&s
->pmc
.cfu_fdro
);
641 sysbus_realize(sbd
, &error_fatal
);
642 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_CFU_FDRO
,
643 sysbus_mmio_get_region(sbd
, 0));
646 for (i
= 0; i
< ARRAY_SIZE(s
->pmc
.cframe
); i
++) {
647 g_autofree
char *name
= g_strdup_printf("cframe%d", i
);
649 object_initialize_child(OBJECT(s
), name
, &s
->pmc
.cframe
[i
],
650 TYPE_XLNX_VERSAL_CFRAME_REG
);
652 sbd
= SYS_BUS_DEVICE(&s
->pmc
.cframe
[i
]);
653 dev
= DEVICE(&s
->pmc
.cframe
[i
]);
655 if (i
< ARRAY_SIZE(cframe_cfg
)) {
656 object_property_set_int(OBJECT(dev
), "blktype0-frames",
657 cframe_cfg
[i
].blktype0_frames
,
659 object_property_set_int(OBJECT(dev
), "blktype1-frames",
660 cframe_cfg
[i
].blktype1_frames
,
662 object_property_set_int(OBJECT(dev
), "blktype2-frames",
663 cframe_cfg
[i
].blktype2_frames
,
665 object_property_set_int(OBJECT(dev
), "blktype3-frames",
666 cframe_cfg
[i
].blktype3_frames
,
668 object_property_set_int(OBJECT(dev
), "blktype4-frames",
669 cframe_cfg
[i
].blktype4_frames
,
671 object_property_set_int(OBJECT(dev
), "blktype5-frames",
672 cframe_cfg
[i
].blktype5_frames
,
674 object_property_set_int(OBJECT(dev
), "blktype6-frames",
675 cframe_cfg
[i
].blktype6_frames
,
678 object_property_set_link(OBJECT(dev
), "cfu-fdro",
679 OBJECT(&s
->pmc
.cfu_fdro
), &error_fatal
);
681 sysbus_realize(SYS_BUS_DEVICE(dev
), &error_fatal
);
683 memory_region_add_subregion(&s
->mr_ps
, cframe_addr
[i
].reg_base
,
684 sysbus_mmio_get_region(sbd
, 0));
685 memory_region_add_subregion(&s
->mr_ps
, cframe_addr
[i
].fdri_base
,
686 sysbus_mmio_get_region(sbd
, 1));
687 sysbus_connect_irq(sbd
, 0,
688 qdev_get_gpio_in(DEVICE(&s
->pmc
.apb_irq_orgate
),
693 object_initialize_child(OBJECT(s
), "cframe_bcast", &s
->pmc
.cframe_bcast
,
694 TYPE_XLNX_VERSAL_CFRAME_BCAST_REG
);
696 sbd
= SYS_BUS_DEVICE(&s
->pmc
.cframe_bcast
);
697 dev
= DEVICE(&s
->pmc
.cframe_bcast
);
699 for (i
= 0; i
< ARRAY_SIZE(s
->pmc
.cframe
); i
++) {
700 g_autofree
char *propname
= g_strdup_printf("cframe%d", i
);
701 object_property_set_link(OBJECT(dev
), propname
,
702 OBJECT(&s
->pmc
.cframe
[i
]), &error_fatal
);
705 sysbus_realize(sbd
, &error_fatal
);
707 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_CFRAME_BCAST_REG
,
708 sysbus_mmio_get_region(sbd
, 0));
709 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_CFRAME_BCAST_FDRI
,
710 sysbus_mmio_get_region(sbd
, 1));
713 object_initialize_child(OBJECT(s
), "cfu-apb", &s
->pmc
.cfu_apb
,
714 TYPE_XLNX_VERSAL_CFU_APB
);
715 sbd
= SYS_BUS_DEVICE(&s
->pmc
.cfu_apb
);
716 dev
= DEVICE(&s
->pmc
.cfu_apb
);
718 for (i
= 0; i
< ARRAY_SIZE(s
->pmc
.cframe
); i
++) {
719 g_autofree
char *propname
= g_strdup_printf("cframe%d", i
);
720 object_property_set_link(OBJECT(dev
), propname
,
721 OBJECT(&s
->pmc
.cframe
[i
]), &error_fatal
);
724 sysbus_realize(sbd
, &error_fatal
);
725 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_CFU_APB
,
726 sysbus_mmio_get_region(sbd
, 0));
727 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_CFU_STREAM
,
728 sysbus_mmio_get_region(sbd
, 1));
729 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_CFU_STREAM_2
,
730 sysbus_mmio_get_region(sbd
, 2));
731 sysbus_connect_irq(sbd
, 0, pic
[VERSAL_CFU_IRQ_0
]);
734 object_initialize_child(OBJECT(s
), "cfu-sfr", &s
->pmc
.cfu_sfr
,
735 TYPE_XLNX_VERSAL_CFU_SFR
);
737 sbd
= SYS_BUS_DEVICE(&s
->pmc
.cfu_sfr
);
739 object_property_set_link(OBJECT(&s
->pmc
.cfu_sfr
),
740 "cfu", OBJECT(&s
->pmc
.cfu_apb
), &error_abort
);
742 sysbus_realize(sbd
, &error_fatal
);
743 memory_region_add_subregion(&s
->mr_ps
, MM_PMC_CFU_SFR
,
744 sysbus_mmio_get_region(sbd
, 0));
747 static void versal_create_crl(Versal
*s
, qemu_irq
*pic
)
752 object_initialize_child(OBJECT(s
), "crl", &s
->lpd
.crl
,
753 TYPE_XLNX_VERSAL_CRL
);
754 sbd
= SYS_BUS_DEVICE(&s
->lpd
.crl
);
756 for (i
= 0; i
< ARRAY_SIZE(s
->lpd
.rpu
.cpu
); i
++) {
757 g_autofree gchar
*name
= g_strdup_printf("cpu_r5[%d]", i
);
759 object_property_set_link(OBJECT(&s
->lpd
.crl
),
760 name
, OBJECT(&s
->lpd
.rpu
.cpu
[i
]),
764 for (i
= 0; i
< ARRAY_SIZE(s
->lpd
.iou
.gem
); i
++) {
765 g_autofree gchar
*name
= g_strdup_printf("gem[%d]", i
);
767 object_property_set_link(OBJECT(&s
->lpd
.crl
),
768 name
, OBJECT(&s
->lpd
.iou
.gem
[i
]),
772 for (i
= 0; i
< ARRAY_SIZE(s
->lpd
.iou
.adma
); i
++) {
773 g_autofree gchar
*name
= g_strdup_printf("adma[%d]", i
);
775 object_property_set_link(OBJECT(&s
->lpd
.crl
),
776 name
, OBJECT(&s
->lpd
.iou
.adma
[i
]),
780 for (i
= 0; i
< ARRAY_SIZE(s
->lpd
.iou
.uart
); i
++) {
781 g_autofree gchar
*name
= g_strdup_printf("uart[%d]", i
);
783 object_property_set_link(OBJECT(&s
->lpd
.crl
),
784 name
, OBJECT(&s
->lpd
.iou
.uart
[i
]),
788 object_property_set_link(OBJECT(&s
->lpd
.crl
),
789 "usb", OBJECT(&s
->lpd
.iou
.usb
),
792 sysbus_realize(sbd
, &error_fatal
);
793 memory_region_add_subregion(&s
->mr_ps
, MM_CRL
,
794 sysbus_mmio_get_region(sbd
, 0));
795 sysbus_connect_irq(sbd
, 0, pic
[VERSAL_CRL_IRQ
]);
798 /* This takes the board allocated linear DDR memory and creates aliases
799 * for each split DDR range/aperture on the Versal address map.
801 static void versal_map_ddr(Versal
*s
)
803 uint64_t size
= memory_region_size(s
->cfg
.mr_ddr
);
804 /* Describes the various split DDR access regions. */
805 static const struct {
809 { MM_TOP_DDR
, MM_TOP_DDR_SIZE
},
810 { MM_TOP_DDR_2
, MM_TOP_DDR_2_SIZE
},
811 { MM_TOP_DDR_3
, MM_TOP_DDR_3_SIZE
},
812 { MM_TOP_DDR_4
, MM_TOP_DDR_4_SIZE
}
817 assert(ARRAY_SIZE(addr_ranges
) == ARRAY_SIZE(s
->noc
.mr_ddr_ranges
));
818 for (i
= 0; i
< ARRAY_SIZE(addr_ranges
) && size
; i
++) {
822 mapsize
= size
< addr_ranges
[i
].size
? size
: addr_ranges
[i
].size
;
823 name
= g_strdup_printf("noc-ddr-range%d", i
);
824 /* Create the MR alias. */
825 memory_region_init_alias(&s
->noc
.mr_ddr_ranges
[i
], OBJECT(s
),
829 /* Map it onto the NoC MR. */
830 memory_region_add_subregion(&s
->mr_ps
, addr_ranges
[i
].base
,
831 &s
->noc
.mr_ddr_ranges
[i
]);
838 static void versal_unimp_area(Versal
*s
, const char *name
,
840 hwaddr base
, hwaddr size
)
842 DeviceState
*dev
= qdev_new(TYPE_UNIMPLEMENTED_DEVICE
);
843 MemoryRegion
*mr_dev
;
845 qdev_prop_set_string(dev
, "name", name
);
846 qdev_prop_set_uint64(dev
, "size", size
);
847 object_property_add_child(OBJECT(s
), name
, OBJECT(dev
));
848 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev
), &error_fatal
);
850 mr_dev
= sysbus_mmio_get_region(SYS_BUS_DEVICE(dev
), 0);
851 memory_region_add_subregion(mr
, base
, mr_dev
);
854 static void versal_unimp_sd_emmc_sel(void *opaque
, int n
, int level
)
856 qemu_log_mask(LOG_UNIMP
,
857 "Selecting between enabling SD mode or eMMC mode on "
858 "controller %d is not yet implemented\n", n
);
861 static void versal_unimp_qspi_ospi_mux_sel(void *opaque
, int n
, int level
)
863 qemu_log_mask(LOG_UNIMP
,
864 "Selecting between enabling the QSPI or OSPI linear address "
865 "region is not yet implemented\n");
868 static void versal_unimp_irq_parity_imr(void *opaque
, int n
, int level
)
870 qemu_log_mask(LOG_UNIMP
,
871 "PMC SLCR parity interrupt behaviour "
872 "is not yet implemented\n");
875 static void versal_unimp(Versal
*s
)
879 versal_unimp_area(s
, "psm", &s
->mr_ps
,
880 MM_PSM_START
, MM_PSM_END
- MM_PSM_START
);
881 versal_unimp_area(s
, "crf", &s
->mr_ps
,
882 MM_FPD_CRF
, MM_FPD_CRF_SIZE
);
883 versal_unimp_area(s
, "apu", &s
->mr_ps
,
884 MM_FPD_FPD_APU
, MM_FPD_FPD_APU_SIZE
);
885 versal_unimp_area(s
, "crp", &s
->mr_ps
,
886 MM_PMC_CRP
, MM_PMC_CRP_SIZE
);
887 versal_unimp_area(s
, "iou-scntr", &s
->mr_ps
,
888 MM_IOU_SCNTR
, MM_IOU_SCNTR_SIZE
);
889 versal_unimp_area(s
, "iou-scntr-seucre", &s
->mr_ps
,
890 MM_IOU_SCNTRS
, MM_IOU_SCNTRS_SIZE
);
892 qdev_init_gpio_in_named(DEVICE(s
), versal_unimp_sd_emmc_sel
,
893 "sd-emmc-sel-dummy", 2);
894 qdev_init_gpio_in_named(DEVICE(s
), versal_unimp_qspi_ospi_mux_sel
,
895 "qspi-ospi-mux-sel-dummy", 1);
896 qdev_init_gpio_in_named(DEVICE(s
), versal_unimp_irq_parity_imr
,
897 "irq-parity-imr-dummy", 1);
899 gpio_in
= qdev_get_gpio_in_named(DEVICE(s
), "sd-emmc-sel-dummy", 0);
900 qdev_connect_gpio_out_named(DEVICE(&s
->pmc
.iou
.slcr
), "sd-emmc-sel", 0,
903 gpio_in
= qdev_get_gpio_in_named(DEVICE(s
), "sd-emmc-sel-dummy", 1);
904 qdev_connect_gpio_out_named(DEVICE(&s
->pmc
.iou
.slcr
), "sd-emmc-sel", 1,
907 gpio_in
= qdev_get_gpio_in_named(DEVICE(s
), "qspi-ospi-mux-sel-dummy", 0);
908 qdev_connect_gpio_out_named(DEVICE(&s
->pmc
.iou
.slcr
),
909 "qspi-ospi-mux-sel", 0,
912 gpio_in
= qdev_get_gpio_in_named(DEVICE(s
), "irq-parity-imr-dummy", 0);
913 qdev_connect_gpio_out_named(DEVICE(&s
->pmc
.iou
.slcr
),
914 SYSBUS_DEVICE_GPIO_IRQ
, 0,
918 static void versal_realize(DeviceState
*dev
, Error
**errp
)
920 Versal
*s
= XLNX_VERSAL(dev
);
921 qemu_irq pic
[XLNX_VERSAL_NR_IRQS
];
923 versal_create_apu_cpus(s
);
924 versal_create_apu_gic(s
, pic
);
925 versal_create_rpu_cpus(s
);
926 versal_create_uarts(s
, pic
);
927 versal_create_canfds(s
, pic
);
928 versal_create_usbs(s
, pic
);
929 versal_create_gems(s
, pic
);
930 versal_create_admas(s
, pic
);
931 versal_create_sds(s
, pic
);
932 versal_create_pmc_apb_irq_orgate(s
, pic
);
933 versal_create_rtc(s
, pic
);
934 versal_create_trng(s
, pic
);
935 versal_create_xrams(s
, pic
);
936 versal_create_bbram(s
, pic
);
937 versal_create_efuse(s
, pic
);
938 versal_create_pmc_iou_slcr(s
, pic
);
939 versal_create_ospi(s
, pic
);
940 versal_create_crl(s
, pic
);
941 versal_create_cfu(s
, pic
);
945 /* Create the On Chip Memory (OCM). */
946 memory_region_init_ram(&s
->lpd
.mr_ocm
, OBJECT(s
), "ocm",
947 MM_OCM_SIZE
, &error_fatal
);
949 memory_region_add_subregion_overlap(&s
->mr_ps
, MM_OCM
, &s
->lpd
.mr_ocm
, 0);
950 memory_region_add_subregion_overlap(&s
->fpd
.apu
.mr
, 0, &s
->mr_ps
, 0);
951 memory_region_add_subregion_overlap(&s
->lpd
.rpu
.mr
, 0,
952 &s
->lpd
.rpu
.mr_ps_alias
, 0);
955 static void versal_init(Object
*obj
)
957 Versal
*s
= XLNX_VERSAL(obj
);
959 memory_region_init(&s
->fpd
.apu
.mr
, obj
, "mr-apu", UINT64_MAX
);
960 memory_region_init(&s
->lpd
.rpu
.mr
, obj
, "mr-rpu", UINT64_MAX
);
961 memory_region_init(&s
->mr_ps
, obj
, "mr-ps-switch", UINT64_MAX
);
962 memory_region_init_alias(&s
->lpd
.rpu
.mr_ps_alias
, OBJECT(s
),
963 "mr-rpu-ps-alias", &s
->mr_ps
, 0, UINT64_MAX
);
966 static Property versal_properties
[] = {
967 DEFINE_PROP_LINK("ddr", Versal
, cfg
.mr_ddr
, TYPE_MEMORY_REGION
,
969 DEFINE_PROP_LINK("canbus0", Versal
, lpd
.iou
.canbus
[0],
970 TYPE_CAN_BUS
, CanBusState
*),
971 DEFINE_PROP_LINK("canbus1", Versal
, lpd
.iou
.canbus
[1],
972 TYPE_CAN_BUS
, CanBusState
*),
973 DEFINE_PROP_END_OF_LIST()
976 static void versal_class_init(ObjectClass
*klass
, void *data
)
978 DeviceClass
*dc
= DEVICE_CLASS(klass
);
980 dc
->realize
= versal_realize
;
981 device_class_set_props(dc
, versal_properties
);
982 /* No VMSD since we haven't got any top-level SoC state to save. */
985 static const TypeInfo versal_info
= {
986 .name
= TYPE_XLNX_VERSAL
,
987 .parent
= TYPE_SYS_BUS_DEVICE
,
988 .instance_size
= sizeof(Versal
),
989 .instance_init
= versal_init
,
990 .class_init
= versal_class_init
,
993 static void versal_register_types(void)
995 type_register_static(&versal_info
);
998 type_init(versal_register_types
);