#include "hw/qdev-properties.h"
#include "sysemu/kvm.h"
#include "kvm_arm.h"
+#include "target/arm/gtimer.h"
static void a15mp_priv_set_irq(void *opaque, int irq, int level)
{
memory_region_init(&s->container, obj, "a15mp-priv-container", 0x8000);
sysbus_init_mmio(sbd, &s->container);
- sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic),
- gic_class_name());
+ object_initialize_child(obj, "gic", &s->gic, gic_class_name());
qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2);
}
DeviceState *gicdev;
SysBusDevice *busdev;
int i;
- Error *err = NULL;
bool has_el3;
bool has_el2 = false;
Object *cpuobj;
* either all the CPUs have TZ, or none do.
*/
cpuobj = OBJECT(qemu_get_cpu(0));
- has_el3 = object_property_find(cpuobj, "has_el3", NULL) &&
+ has_el3 = object_property_find(cpuobj, "has_el3") &&
object_property_get_bool(cpuobj, "has_el3", &error_abort);
qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3);
/* Similarly for virtualization support */
- has_el2 = object_property_find(cpuobj, "has_el2", NULL) &&
+ has_el2 = object_property_find(cpuobj, "has_el2") &&
object_property_get_bool(cpuobj, "has_el2", &error_abort);
qdev_prop_set_bit(gicdev, "has-virtualization-extensions", has_el2);
}
- object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
- if (err != NULL) {
- error_propagate(errp, err);
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->gic), errp)) {
return;
}
busdev = SYS_BUS_DEVICE(&s->gic);
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = a15mp_priv_realize;
- dc->props = a15mp_priv_properties;
- /* We currently have no savable state */
+ device_class_set_props(dc, a15mp_priv_properties);
+ /* We currently have no saveable state */
}
static const TypeInfo a15mp_priv_info = {