* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "hw.h"
#endif
QEMUTimer *watchdog;
int64_t wt_last_update;
- VLANClientState *vc;
+ NICConf conf;
+ NICState *nic;
int mmio_index;
/* Registers */
}
ticks = s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0];
- s->wt_last_update = qemu_get_clock(vm_clock);
- delay = ticks_per_sec * ticks / 5000000;
+ s->wt_last_update = qemu_get_clock_ns(vm_clock);
+ delay = get_ticks_per_sec() * ticks / 5000000;
qemu_mod_timer(s->watchdog, s->wt_last_update + delay);
}
return;
}
- elapsed = s->wt_last_update - qemu_get_clock(vm_clock);
+ elapsed = s->wt_last_update - qemu_get_clock_ns(vm_clock);
val = s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0];
val -= elapsed / 5000000;
s->regs[SONIC_WT1] = (val >> 16) & 0xffff;
if (s->regs[SONIC_RCR] & (SONIC_RCR_LB1 | SONIC_RCR_LB0)) {
/* Loopback */
s->regs[SONIC_TCR] |= SONIC_TCR_CRSL;
- if (s->vc->can_receive(s->vc)) {
+ if (s->nic->nc.info->can_receive(&s->nic->nc)) {
s->loopback_packet = 1;
- s->vc->receive(s->vc, s->tx_buffer, tx_len);
+ s->nic->nc.info->receive(&s->nic->nc, s->tx_buffer, tx_len);
}
} else {
/* Transmit packet */
- qemu_send_packet(s->vc, s->tx_buffer, tx_len);
+ qemu_send_packet(&s->nic->nc, s->tx_buffer, tx_len);
}
s->regs[SONIC_TCR] |= SONIC_TCR_PTX;
dp8393x_writew(opaque, addr + 2, (val >> 16) & 0xffff);
}
-static CPUReadMemoryFunc *dp8393x_read[3] = {
+static CPUReadMemoryFunc * const dp8393x_read[3] = {
dp8393x_readb,
dp8393x_readw,
dp8393x_readl,
};
-static CPUWriteMemoryFunc *dp8393x_write[3] = {
+static CPUWriteMemoryFunc * const dp8393x_write[3] = {
dp8393x_writeb,
dp8393x_writew,
dp8393x_writel,
};
-static int nic_can_receive(VLANClientState *vc)
+static int nic_can_receive(VLANClientState *nc)
{
- dp8393xState *s = vc->opaque;
+ dp8393xState *s = DO_UPCAST(NICState, nc, nc)->opaque;
if (!(s->regs[SONIC_CR] & SONIC_CR_RXEN))
return 0;
return -1;
}
-static ssize_t nic_receive(VLANClientState *vc, const uint8_t * buf, size_t size)
+static ssize_t nic_receive(VLANClientState *nc, const uint8_t * buf, size_t size)
{
+ dp8393xState *s = DO_UPCAST(NICState, nc, nc)->opaque;
uint16_t data[10];
- dp8393xState *s = vc->opaque;
int packet_type;
uint32_t available, address;
int width, rx_len = size;
dp8393x_update_irq(s);
}
-static void nic_cleanup(VLANClientState *vc)
+static void nic_cleanup(VLANClientState *nc)
{
- dp8393xState *s = vc->opaque;
+ dp8393xState *s = DO_UPCAST(NICState, nc, nc)->opaque;
cpu_unregister_io_memory(s->mmio_index);
qemu_free(s);
}
+static NetClientInfo net_dp83932_info = {
+ .type = NET_CLIENT_TYPE_NIC,
+ .size = sizeof(NICState),
+ .can_receive = nic_can_receive,
+ .receive = nic_receive,
+ .cleanup = nic_cleanup,
+};
+
void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
qemu_irq irq, void* mem_opaque,
void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write))
s->memory_rw = memory_rw;
s->it_shift = it_shift;
s->irq = irq;
- s->watchdog = qemu_new_timer(vm_clock, dp8393x_watchdog, s);
+ s->watchdog = qemu_new_timer_ns(vm_clock, dp8393x_watchdog, s);
s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */
- s->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name, nic_can_receive,
- nic_receive, NULL, nic_cleanup, s);
+ s->conf.macaddr = nd->macaddr;
+ s->conf.vlan = nd->vlan;
+ s->conf.peer = nd->netdev;
+
+ s->nic = qemu_new_nic(&net_dp83932_info, &s->conf, nd->model, nd->name, s);
- qemu_format_nic_info_str(s->vc, nd->macaddr);
- qemu_register_reset(nic_reset, 0, s);
+ qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);
+ qemu_register_reset(nic_reset, s);
nic_reset(s);
- s->mmio_index = cpu_register_io_memory(0, dp8393x_read, dp8393x_write, s);
+ s->mmio_index = cpu_register_io_memory(dp8393x_read, dp8393x_write, s,
+ DEVICE_NATIVE_ENDIAN);
cpu_register_physical_memory(base, 0x40 << it_shift, s->mmio_index);
}