softmmu: move include files to include/sysemu/

[qemu.git] / hw / etraxfs_dma.c

diff --git a/hw/etraxfs_dma.c b/hw/etraxfs_dma.c
index d2bd584bc55d44c33d0c9ed440238005ab8dfecc..d41500316fbf4c7123ff8ffd04b9985d98d04d52 100644 (file)
--- a/hw/etraxfs_dma.c
+++ b/hw/etraxfs_dma.c
@@ -24,9 +24,9 @@
 #include <stdio.h>
 #include <sys/time.h>
 #include "hw.h"
-#include "exec-memory.h"
+#include "exec/address-spaces.h"
 #include "qemu-common.h"
-#include "sysemu.h"
+#include "sysemu/sysemu.h"
 
 #include "etraxfs_dma.h"
 
@@ -212,7 +212,7 @@ static inline int channel_en(struct fs_dma_ctrl *ctrl, int c)
                && ctrl->channels[c].client;
 }
 
-static inline int fs_channel(target_phys_addr_t addr)
+static inline int fs_channel(hwaddr addr)
 {
        /* Every channel has a 0x2000 ctrl register map.  */
        return addr >> 13;
@@ -221,7 +221,7 @@ static inline int fs_channel(target_phys_addr_t addr)
 #ifdef USE_THIS_DEAD_CODE
 static void channel_load_g(struct fs_dma_ctrl *ctrl, int c)
 {
-       target_phys_addr_t addr = channel_reg(ctrl, c, RW_GROUP);
+       hwaddr addr = channel_reg(ctrl, c, RW_GROUP);
 
        /* Load and decode. FIXME: handle endianness.  */
        cpu_physical_memory_read (addr, 
@@ -253,7 +253,7 @@ static void dump_d(int ch, struct dma_descr_data *d)
 
 static void channel_load_c(struct fs_dma_ctrl *ctrl, int c)
 {
-       target_phys_addr_t addr = channel_reg(ctrl, c, RW_GROUP_DOWN);
+       hwaddr addr = channel_reg(ctrl, c, RW_GROUP_DOWN);
 
        /* Load and decode. FIXME: handle endianness.  */
        cpu_physical_memory_read (addr, 
@@ -270,7 +270,7 @@ static void channel_load_c(struct fs_dma_ctrl *ctrl, int c)
 
 static void channel_load_d(struct fs_dma_ctrl *ctrl, int c)
 {
-       target_phys_addr_t addr = channel_reg(ctrl, c, RW_SAVED_DATA);
+       hwaddr addr = channel_reg(ctrl, c, RW_SAVED_DATA);
 
        /* Load and decode. FIXME: handle endianness.  */
        D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));
@@ -284,7 +284,7 @@ static void channel_load_d(struct fs_dma_ctrl *ctrl, int c)
 
 static void channel_store_c(struct fs_dma_ctrl *ctrl, int c)
 {
-       target_phys_addr_t addr = channel_reg(ctrl, c, RW_GROUP_DOWN);
+       hwaddr addr = channel_reg(ctrl, c, RW_GROUP_DOWN);
 
        /* Encode and store. FIXME: handle endianness.  */
        D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));
@@ -296,7 +296,7 @@ static void channel_store_c(struct fs_dma_ctrl *ctrl, int c)
 
 static void channel_store_d(struct fs_dma_ctrl *ctrl, int c)
 {
-       target_phys_addr_t addr = channel_reg(ctrl, c, RW_SAVED_DATA);
+       hwaddr addr = channel_reg(ctrl, c, RW_SAVED_DATA);
 
        /* Encode and store. FIXME: handle endianness.  */
        D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));
@@ -401,15 +401,29 @@ static int channel_out_run(struct fs_dma_ctrl *ctrl, int c)
        uint32_t saved_data_buf;
        unsigned char buf[2 * 1024];
 
+       struct dma_context_metadata meta;
+       bool send_context = true;
+
        if (ctrl->channels[c].eol)
                return 0;
 
        do {
+               bool out_eop;
                D(printf("ch=%d buf=%x after=%x\n",
                         c,
                         (uint32_t)ctrl->channels[c].current_d.buf,
                         (uint32_t)ctrl->channels[c].current_d.after));
 
+               if (send_context) {
+                       if (ctrl->channels[c].client->client.metadata_push) {
+                               meta.metadata = ctrl->channels[c].current_d.md;
+                               ctrl->channels[c].client->client.metadata_push(
+                                       ctrl->channels[c].client->client.opaque,
+                                       &meta);
+                       }
+                       send_context = false;
+               }
+
                channel_load_d(ctrl, c);
                saved_data_buf = channel_reg(ctrl, c, RW_SAVED_DATA_BUF);
                len = (uint32_t)(unsigned long)
@@ -420,13 +434,17 @@ static int channel_out_run(struct fs_dma_ctrl *ctrl, int c)
                        len = sizeof buf;
                cpu_physical_memory_read (saved_data_buf, buf, len);
 
-               D(printf("channel %d pushes %x %u bytes\n", c, 
-                        saved_data_buf, len));
+               out_eop = ((saved_data_buf + len) ==
+                          ctrl->channels[c].current_d.after) &&
+                       ctrl->channels[c].current_d.out_eop;
+
+               D(printf("channel %d pushes %x %u bytes eop=%u\n", c,
+                        saved_data_buf, len, out_eop));
 
                if (ctrl->channels[c].client->client.push)
                        ctrl->channels[c].client->client.push(
                                ctrl->channels[c].client->client.opaque,
-                               buf, len);
+                               buf, len, out_eop);
                else
                        printf("WARNING: DMA ch%d dataloss,"
                               " no attached client.\n", c);
@@ -437,11 +455,9 @@ static int channel_out_run(struct fs_dma_ctrl *ctrl, int c)
                                ctrl->channels[c].current_d.after) {
                        /* Done. Step to next.  */
                        if (ctrl->channels[c].current_d.out_eop) {
-                               /* TODO: signal eop to the client.  */
-                               D(printf("signal eop\n"));
+                               send_context = true;
                        }
                        if (ctrl->channels[c].current_d.intr) {
-                               /* TODO: signal eop to the client.  */
                                /* data intr.  */
                                D(printf("signal intr %d eol=%d\n",
                                        len, ctrl->channels[c].current_d.eol));
@@ -557,14 +573,14 @@ static inline int channel_in_run(struct fs_dma_ctrl *ctrl, int c)
                return 0;
 }
 
-static uint32_t dma_rinvalid (void *opaque, target_phys_addr_t addr)
+static uint32_t dma_rinvalid (void *opaque, hwaddr addr)
 {
         hw_error("Unsupported short raccess. reg=" TARGET_FMT_plx "\n", addr);
         return 0;
 }
 
 static uint64_t
-dma_read(void *opaque, target_phys_addr_t addr, unsigned int size)
+dma_read(void *opaque, hwaddr addr, unsigned int size)
 {
         struct fs_dma_ctrl *ctrl = opaque;
        int c;
@@ -596,7 +612,7 @@ dma_read(void *opaque, target_phys_addr_t addr, unsigned int size)
 }
 
 static void
-dma_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
+dma_winvalid (void *opaque, hwaddr addr, uint32_t value)
 {
         hw_error("Unsupported short waccess. reg=" TARGET_FMT_plx "\n", addr);
 }
@@ -611,7 +627,7 @@ dma_update_state(struct fs_dma_ctrl *ctrl, int c)
 }
 
 static void
-dma_write(void *opaque, target_phys_addr_t addr,
+dma_write(void *opaque, hwaddr addr,
          uint64_t val64, unsigned int size)
 {
         struct fs_dma_ctrl *ctrl = opaque;
@@ -746,7 +762,7 @@ static void DMA_run(void *opaque)
         qemu_bh_schedule_idle(etraxfs_dmac->bh);
 }
 
-void *etraxfs_dmac_init(target_phys_addr_t base, int nr_channels)
+void *etraxfs_dmac_init(hwaddr base, int nr_channels)
 {
        struct fs_dma_ctrl *ctrl = NULL;