fs->regs[R_R_MASKED_VECT] = fs->regs[R_R_VECT] & fs->regs[R_RW_MASK];
- /* The ETRAX interrupt controller signals interrupts to teh core
+ /* The ETRAX interrupt controller signals interrupts to the core
through an interrupt request wire and an irq vector bus. If
multiple interrupts are simultaneously active it chooses vector
0x30 and lets the sw choose the priorities. */