#include "sysbus.h"
#include "primecell.h"
#include "devices.h"
-#include "sysemu.h"
#include "boards.h"
#include "arm-misc.h"
#include "net.h"
}
memcpy(integrator_spd + 73, "QEMU-MEMORY", 11);
s->cm_init = 0x00000112;
- s->flash_offset = qemu_ram_alloc(0x100000);
+ s->flash_offset = qemu_ram_alloc(NULL, "integrator.flash", 0x100000);
iomemtype = cpu_register_io_memory(integratorcm_readfn,
- integratorcm_writefn, s);
+ integratorcm_writefn, s,
+ DEVICE_NATIVE_ENDIAN);
sysbus_init_mmio(dev, 0x00800000, iomemtype);
integratorcm_do_remap(s, 1);
/* ??? Save/restore. */
sysbus_init_irq(dev, &s->parent_irq);
sysbus_init_irq(dev, &s->parent_fiq);
iomemtype = cpu_register_io_memory(icp_pic_readfn,
- icp_pic_writefn, s);
+ icp_pic_writefn, s,
+ DEVICE_NATIVE_ENDIAN);
sysbus_init_mmio(dev, 0x00800000, iomemtype);
return 0;
}
int iomemtype;
iomemtype = cpu_register_io_memory(icp_control_readfn,
- icp_control_writefn, NULL);
+ icp_control_writefn, NULL,
+ DEVICE_NATIVE_ENDIAN);
cpu_register_physical_memory(base, 0x00800000, iomemtype);
/* ??? Save/restore. */
}
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
- ram_offset = qemu_ram_alloc(ram_size);
+ ram_offset = qemu_ram_alloc(NULL, "integrator.ram", ram_size);
/* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero*/
dev = qdev_create(NULL, "integrator_core");
qdev_prop_set_uint32(dev, "memsz", ram_size >> 20);
- qdev_init(dev);
+ qdev_init_nofail(dev);
sysbus_mmio_map((SysBusDevice *)dev, 0, 0x10000000);
cpu_pic = arm_pic_init_cpu(env);