*/
#include "hw.h"
#include "firmware_abi.h"
-#include "sysemu.h"
+#include "sysemu/sysemu.h"
#include "ppc_mac.h"
/* debug NVR */
#endif
struct MacIONVRAMState {
- target_phys_addr_t size;
- int mem_index;
+ uint32_t size;
+ MemoryRegion mem;
unsigned int it_shift;
uint8_t *data;
};
}
/* macio style NVRAM device */
-static void macio_nvram_writeb (void *opaque,
- target_phys_addr_t addr, uint32_t value)
+static void macio_nvram_writeb(void *opaque, hwaddr addr,
+ uint64_t value, unsigned size)
{
MacIONVRAMState *s = opaque;
NVR_DPRINTF("writeb addr %04x val %x\n", (int)addr, value);
}
-static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr)
+static uint64_t macio_nvram_readb(void *opaque, hwaddr addr,
+ unsigned size)
{
MacIONVRAMState *s = opaque;
uint32_t value;
return value;
}
-static CPUWriteMemoryFunc *nvram_write[] = {
- &macio_nvram_writeb,
- &macio_nvram_writeb,
- &macio_nvram_writeb,
+static const MemoryRegionOps macio_nvram_ops = {
+ .read = macio_nvram_readb,
+ .write = macio_nvram_writeb,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
-static CPUReadMemoryFunc *nvram_read[] = {
- &macio_nvram_readb,
- &macio_nvram_readb,
- &macio_nvram_readb,
+static const VMStateDescription vmstate_macio_nvram = {
+ .name = "macio_nvram",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .minimum_version_id_old = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_VBUFFER_UINT32(data, MacIONVRAMState, 0, NULL, 0, size),
+ VMSTATE_END_OF_LIST()
+ }
};
-static void macio_nvram_save(QEMUFile *f, void *opaque)
-{
- MacIONVRAMState *s = (MacIONVRAMState *)opaque;
-
- qemu_put_buffer(f, s->data, s->size);
-}
-
-static int macio_nvram_load(QEMUFile *f, void *opaque, int version_id)
-{
- MacIONVRAMState *s = (MacIONVRAMState *)opaque;
-
- if (version_id != 1)
- return -EINVAL;
-
- qemu_get_buffer(f, s->data, s->size);
-
- return 0;
-}
static void macio_nvram_reset(void *opaque)
{
}
-MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size,
+MacIONVRAMState *macio_nvram_init (hwaddr size,
unsigned int it_shift)
{
MacIONVRAMState *s;
- s = qemu_mallocz(sizeof(MacIONVRAMState));
- s->data = qemu_mallocz(size);
+ s = g_malloc0(sizeof(MacIONVRAMState));
+ s->data = g_malloc0(size);
s->size = size;
s->it_shift = it_shift;
- s->mem_index = cpu_register_io_memory(nvram_read, nvram_write, s);
- *mem_index = s->mem_index;
- register_savevm("macio_nvram", -1, 1, macio_nvram_save, macio_nvram_load,
- s);
- qemu_register_reset(macio_nvram_reset, 0, s);
- macio_nvram_reset(s);
+ memory_region_init_io(&s->mem, &macio_nvram_ops, s, "macio-nvram",
+ size << it_shift);
+ vmstate_register(NULL, -1, &vmstate_macio_nvram, s);
+ qemu_register_reset(macio_nvram_reset, s);
return s;
}
-void macio_nvram_map (void *opaque, target_phys_addr_t mem_base)
+void macio_nvram_setup_bar(MacIONVRAMState *s, MemoryRegion *bar,
+ hwaddr mem_base)
{
- MacIONVRAMState *s;
-
- s = opaque;
- cpu_register_physical_memory(mem_base, s->size << s->it_shift,
- s->mem_index);
+ memory_region_add_subregion(bar, mem_base, &s->mem);
}
/* Set up a system OpenBIOS NVRAM partition */