#include "vmware_vga.h"
#include "qemu-char.h"
#include "sysemu.h"
-#include "audio/audio.h"
+#include "arch_init.h"
#include "boards.h"
#include "qemu-log.h"
#include "mips-bios.h"
#include "ide.h"
#include "loader.h"
#include "elf.h"
+#include "mc146818rtc.h"
+#include "blockdev.h"
+#include "exec-memory.h"
//#define DEBUG_BOARD_INIT
SerialState *uart;
} MaltaFPGAState;
-static PITState *pit;
+static ISADevice *pit;
static struct _loaderparams {
int ram_size;
}
leds_text[8] = '\0';
- qemu_chr_printf(s->display, "\e[H\n\n|\e[32m%-8.8s\e[00m|\r\n", leds_text);
- qemu_chr_printf(s->display, "\n\n\n\n|\e[31m%-8.8s\e[00m|", s->display_text);
+ qemu_chr_fe_printf(s->display, "\e[H\n\n|\e[32m%-8.8s\e[00m|\r\n", leds_text);
+ qemu_chr_fe_printf(s->display, "\n\n\n\n|\e[31m%-8.8s\e[00m|", s->display_text);
}
/*
static void malta_fpga_led_init(CharDriverState *chr)
{
- qemu_chr_printf(chr, "\e[HMalta LEDBAR\r\n");
- qemu_chr_printf(chr, "+--------+\r\n");
- qemu_chr_printf(chr, "+ +\r\n");
- qemu_chr_printf(chr, "+--------+\r\n");
- qemu_chr_printf(chr, "\n");
- qemu_chr_printf(chr, "Malta ASCII\r\n");
- qemu_chr_printf(chr, "+--------+\r\n");
- qemu_chr_printf(chr, "+ +\r\n");
- qemu_chr_printf(chr, "+--------+\r\n");
+ qemu_chr_fe_printf(chr, "\e[HMalta LEDBAR\r\n");
+ qemu_chr_fe_printf(chr, "+--------+\r\n");
+ qemu_chr_fe_printf(chr, "+ +\r\n");
+ qemu_chr_fe_printf(chr, "+--------+\r\n");
+ qemu_chr_fe_printf(chr, "\n");
+ qemu_chr_fe_printf(chr, "Malta ASCII\r\n");
+ qemu_chr_fe_printf(chr, "+--------+\r\n");
+ qemu_chr_fe_printf(chr, "+ +\r\n");
+ qemu_chr_fe_printf(chr, "+--------+\r\n");
}
static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, qemu_irq uart_irq, CharDriverState *uart_chr)
MaltaFPGAState *s;
int malta;
- s = (MaltaFPGAState *)qemu_mallocz(sizeof(MaltaFPGAState));
+ s = (MaltaFPGAState *)g_malloc0(sizeof(MaltaFPGAState));
malta = cpu_register_io_memory(malta_fpga_read,
- malta_fpga_write, s);
+ malta_fpga_write, s,
+ DEVICE_NATIVE_ENDIAN);
cpu_register_physical_memory(base, 0x900, malta);
/* 0xa00 is less than a page, so will still get the right offsets. */
cpu_register_physical_memory(base + 0xa00, 0x100000 - 0xa00, malta);
- s->display = qemu_chr_open("fpga", "vc:320x200", malta_fpga_led_init);
+ s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
#ifdef TARGET_WORDS_BIGENDIAN
s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, 1, 1);
return s;
}
-/* Audio support */
-#ifdef HAS_AUDIO
-static void audio_init (PCIBus *pci_bus)
-{
- struct soundhw *c;
- int audio_enabled = 0;
-
- for (c = soundhw; !audio_enabled && c->name; ++c) {
- audio_enabled = c->enabled;
- }
-
- if (audio_enabled) {
- for (c = soundhw; c->name; ++c) {
- if (c->enabled) {
- c->init.init_pci(pci_bus);
- }
- }
- }
-}
-#endif
-
/* Network support */
static void network_init(void)
{
}
-static void prom_set(uint32_t* prom_buf, int index, const char *string, ...)
+static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
+ const char *string, ...)
{
va_list ap;
int32_t table_addr;
/* Setup prom parameters. */
prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
- prom_buf = qemu_malloc(prom_size);
+ prom_buf = g_malloc(prom_size);
- prom_set(prom_buf, prom_index++, loaderparams.kernel_filename);
+ prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_filename);
if (initrd_size > 0) {
prom_set(prom_buf, prom_index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
loaderparams.kernel_cmdline);
} else {
- prom_set(prom_buf, prom_index++, loaderparams.kernel_cmdline);
+ prom_set(prom_buf, prom_index++, "%s", loaderparams.kernel_cmdline);
}
prom_set(prom_buf, prom_index++, "memsize");
}
}
+static void cpu_request_exit(void *opaque, int irq, int level)
+{
+ CPUState *env = cpu_single_env;
+
+ if (env && level) {
+ cpu_exit(env);
+ }
+}
+
static
void mips_malta_init (ram_addr_t ram_size,
const char *boot_device,
const char *initrd_filename, const char *cpu_model)
{
char *filename;
+ pflash_t *fl;
ram_addr_t ram_offset;
- ram_addr_t bios_offset;
+ MemoryRegion *system_memory = get_system_memory();
+ MemoryRegion *bios, *bios_alias = g_new(MemoryRegion, 1);
target_long bios_size;
int64_t kernel_entry;
PCIBus *pci_bus;
- ISADevice *isa_dev;
CPUState *env;
- RTCState *rtc_state;
- FDCtrl *floppy_controller;
- MaltaFPGAState *malta_fpga;
qemu_irq *i8259;
+ qemu_irq *cpu_exit_irq;
int piix4_devfn;
- uint8_t *eeprom_buf;
i2c_bus *smbus;
int i;
DriveInfo *dinfo;
DriveInfo *fd[MAX_FD];
int fl_idx = 0;
int fl_sectors = 0;
+ int be;
/* Make sure the first 3 serial ports are associated with a device. */
for(i = 0; i < 3; i++) {
if (!serial_hds[i]) {
char label[32];
snprintf(label, sizeof(label), "serial%d", i);
- serial_hds[i] = qemu_chr_open(label, "null", NULL);
+ serial_hds[i] = qemu_chr_new(label, "null", NULL);
}
}
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
- ram_offset = qemu_ram_alloc(ram_size);
- bios_offset = qemu_ram_alloc(BIOS_SIZE);
-
+ ram_offset = qemu_ram_alloc(NULL, "mips_malta.ram", ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
- /* Map the bios at two physical locations, as on the real board. */
- cpu_register_physical_memory(0x1e000000LL,
- BIOS_SIZE, bios_offset | IO_MEM_ROM);
- cpu_register_physical_memory(0x1fc00000LL,
- BIOS_SIZE, bios_offset | IO_MEM_ROM);
-
+#ifdef TARGET_WORDS_BIGENDIAN
+ be = 1;
+#else
+ be = 0;
+#endif
/* FPGA */
- malta_fpga = malta_fpga_init(0x1f000000LL, env->irq[2], serial_hds[2]);
+ malta_fpga_init(0x1f000000LL, env->irq[2], serial_hds[2]);
/* Load firmware in flash / BIOS unless we boot directly into a kernel. */
if (kernel_filename) {
/* Write a small bootloader to the flash location. */
+ bios = g_new(MemoryRegion, 1);
+ memory_region_init_ram(bios, NULL, "mips_malta.bios", BIOS_SIZE);
+ memory_region_set_readonly(bios, true);
+ memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZE);
+ /* Map the bios at two physical locations, as on the real board. */
+ memory_region_add_subregion(system_memory, 0x1e000000LL, bios);
+ memory_region_add_subregion(system_memory, 0x1fc00000LL, bios_alias);
loaderparams.ram_size = ram_size;
loaderparams.kernel_filename = kernel_filename;
loaderparams.kernel_cmdline = kernel_cmdline;
loaderparams.initrd_filename = initrd_filename;
kernel_entry = load_kernel();
- write_bootloader(env, qemu_get_ram_ptr(bios_offset), kernel_entry);
+ write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
} else {
dinfo = drive_get(IF_PFLASH, 0, fl_idx);
if (dinfo) {
fl_sectors = bios_size >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size " TARGET_FMT_lx " at "
- "offset %08lx addr %08llx '%s' %x\n",
- fl_idx, bios_size, bios_offset, 0x1e000000LL,
+ "addr %08llx '%s' %x\n",
+ fl_idx, bios_size, 0x1e000000LL,
bdrv_get_device_name(dinfo->bdrv), fl_sectors);
#endif
- pflash_cfi01_register(0x1e000000LL, bios_offset,
- dinfo->bdrv, 65536, fl_sectors,
- 4, 0x0000, 0x0000, 0x0000, 0x0000);
- fl_idx++;
+ fl = pflash_cfi01_register(0x1e000000LL,
+ NULL, "mips_malta.bios", BIOS_SIZE,
+ dinfo->bdrv, 65536, fl_sectors,
+ 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
+ bios = pflash_cfi01_get_memory(fl);
+ /* Map the bios at two physical locations, as on the real board. */
+ memory_region_init_alias(bios_alias, "bios.1fc",
+ bios, 0, BIOS_SIZE);
+ memory_region_add_subregion(system_memory, 0x1fc00000LL,
+ bios_alias);
+ fl_idx++;
} else {
+ bios = g_new(MemoryRegion, 1);
+ memory_region_init_ram(bios, NULL, "mips_malta.bios", BIOS_SIZE);
+ memory_region_set_readonly(bios, true);
+ memory_region_init_alias(bios_alias, "bios.1fc",
+ bios, 0, BIOS_SIZE);
+ /* Map the bios at two physical locations, as on the real board. */
+ memory_region_add_subregion(system_memory, 0x1e000000LL, bios);
+ memory_region_add_subregion(system_memory, 0x1fc00000LL,
+ bios_alias);
/* Load a BIOS image. */
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
if (filename) {
bios_size = load_image_targphys(filename, 0x1fc00000LL,
BIOS_SIZE);
- qemu_free(filename);
+ g_free(filename);
} else {
bios_size = -1;
}
a neat trick which allows bi-endian firmware. */
#ifndef TARGET_WORDS_BIGENDIAN
{
- uint32_t *addr = qemu_get_ram_ptr(bios_offset);;
+ uint32_t *addr = memory_region_get_ram_ptr(bios);
uint32_t *end = addr + bios_size;
while (addr < end) {
bswap32s(addr);
/* Board ID = 0x420 (Malta Board with CoreLV)
XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 should
map to the board ID. */
- stl_phys(0x1fc00010LL, 0x00000420);
+ stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420);
/* Init internal devices */
cpu_mips_irq_init_cpu(env);
i8259 = i8259_init(env->irq[2]);
/* Northbridge */
- pci_bus = pci_gt64120_init(i8259);
+ pci_bus = gt64120_register(i8259);
/* Southbridge */
-
- if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
- fprintf(stderr, "qemu: too many IDE bus\n");
- exit(1);
- }
-
- for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
- hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
- }
+ ide_drive_get(hd, MAX_IDE_BUS);
piix4_devfn = piix4_init(pci_bus, 80);
isa_bus_irqs(i8259);
pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1);
usb_uhci_piix4_init(pci_bus, piix4_devfn + 2);
- smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_reserve_irq(9));
- eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
- for (i = 0; i < 8; i++) {
- /* TODO: Populate SPD eeprom data. */
- DeviceState *eeprom;
- eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
- qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
- qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
- qdev_init_nofail(eeprom);
- }
- pit = pit_init(0x40, isa_reserve_irq(0));
- DMA_init(0);
+ smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_get_irq(9),
+ NULL, NULL, 0);
+ /* TODO: Populate SPD eeprom data. */
+ smbus_eeprom_init(smbus, 8, NULL, 0);
+ pit = pit_init(0x40, 0);
+ cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
+ DMA_init(0, cpu_exit_irq);
/* Super I/O */
- isa_dev = isa_create_simple("i8042");
-
- rtc_state = rtc_init(2000);
+ isa_create_simple("i8042");
+
+ rtc_init(2000, NULL);
serial_isa_init(0, serial_hds[0]);
serial_isa_init(1, serial_hds[1]);
if (parallel_hds[0])
for(i = 0; i < MAX_FD; i++) {
fd[i] = drive_get(IF_FLOPPY, 0, i);
}
- floppy_controller = fdctrl_init_isa(fd);
+ fdctrl_init_isa(fd);
/* Sound card */
-#ifdef HAS_AUDIO
- audio_init(pci_bus);
-#endif
+ audio_init(NULL, pci_bus);
/* Network card */
network_init();
if (cirrus_vga_enabled) {
pci_cirrus_vga_init(pci_bus);
} else if (vmsvga_enabled) {
- pci_vmsvga_init(pci_bus);
+ if (!pci_vmsvga_init(pci_bus)) {
+ fprintf(stderr, "Warning: vmware_vga not available,"
+ " using standard VGA instead\n");
+ pci_vga_init(pci_bus);
+ }
} else if (std_vga_enabled) {
- pci_vga_init(pci_bus, 0, 0);
+ pci_vga_init(pci_bus);
}
}
projects / qemu.git / blobdiff