#include "flash.h"
#include "mips.h"
#include "mips_cpudevs.h"
-#include "pci.h"
+#include "pci/pci.h"
#include "qemu-char.h"
#include "sysemu.h"
#include "arch_init.h"
eeprom.sda = sda;
}
-static uint64_t malta_fpga_read(void *opaque, target_phys_addr_t addr,
+static uint64_t malta_fpga_read(void *opaque, hwaddr addr,
unsigned size)
{
MaltaFPGAState *s = opaque;
return val;
}
-static void malta_fpga_write(void *opaque, target_phys_addr_t addr,
+static void malta_fpga_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
MaltaFPGAState *s = opaque;
}
static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
- target_phys_addr_t base, qemu_irq uart_irq, CharDriverState *uart_chr)
+ hwaddr base, qemu_irq uart_irq, CharDriverState *uart_chr)
{
MaltaFPGAState *s;
be = 0;
#endif
/* FPGA */
- malta_fpga_init(system_memory, FPGA_ADDRESS, env->irq[2], serial_hds[2]);
+ /* The CBUS UART is attached to the MIPS CPU INT2 pin, ie interrupt 4 */
+ malta_fpga_init(system_memory, FPGA_ADDRESS, env->irq[4], serial_hds[2]);
/* Load firmware in flash / BIOS. */
dinfo = drive_get(IF_PFLASH, 0, fl_idx);