* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#include "qemu-common.h"
#include "flash.h"
#include "hw.h"
#include "bt.h"
+#include "loader.h"
/* Nokia N8x0 support */
struct n800_s {
struct {
void *opaque;
uint32_t (*txrx)(void *opaque, uint32_t value, int len);
- struct uwire_slave_s *chip;
+ uWireSlave *chip;
} ts;
i2c_bus *i2c;
int keymap[0x80];
i2c_slave *kbd;
- struct tusb_s *usb;
+ TUSBState *usb;
void *retu;
void *tahvo;
void *nand;
static void n8x0_i2c_setup(struct n800_s *s)
{
+ DeviceState *dev;
qemu_irq tmp_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_TMP105_GPIO)[0];
/* Attach the CPU on one end of our I2C bus. */
s->i2c = omap_i2c_bus(s->cpu->i2c[0]);
/* Attach a menelaus PM chip */
- i2c_set_slave_address(
- twl92230_init(s->i2c,
- s->cpu->irq[0][OMAP_INT_24XX_SYS_NIRQ]),
- N8X0_MENELAUS_ADDR);
+ dev = i2c_create_slave(s->i2c, "twl92230", N8X0_MENELAUS_ADDR);
+ qdev_connect_gpio_out(dev, 3, s->cpu->irq[0][OMAP_INT_24XX_SYS_NIRQ]);
/* Attach a TMP105 PM chip (A0 wired to ground) */
- i2c_set_slave_address(tmp105_init(s->i2c, tmp_irq), N8X0_TMP105_ADDR);
+ dev = i2c_create_slave(s->i2c, "tmp105", N8X0_TMP105_ADDR);
+ qdev_connect_gpio_out(dev, 0, tmp_irq);
}
/* Touchscreen and keypad controller */
-static struct mouse_transform_info_s n800_pointercal = {
+static MouseTransformInfo n800_pointercal = {
.x = 800,
.y = 480,
.a = { 14560, -68, -3455208, -39, -9621, 35152972, 65536 },
};
-static struct mouse_transform_info_s n810_pointercal = {
+static MouseTransformInfo n810_pointercal = {
.x = 800,
.y = 480,
.a = { 15041, 148, -4731056, 171, -10238, 35933380, 65536 },
/* XXX: are the three pins inverted inside the chip between the
* tsc and the cpu (N4111)? */
- qemu_irq penirq = 0; /* NC */
+ qemu_irq penirq = NULL; /* NC */
qemu_irq kbirq = omap2_gpio_in_get(s->cpu->gpif, N800_TSC_KP_IRQ_GPIO)[0];
qemu_irq dav = omap2_gpio_in_get(s->cpu->gpif, N800_TSC_TS_GPIO)[0];
- s->ts.chip = tsc2301_init(penirq, kbirq, dav, 0);
+ s->ts.chip = tsc2301_init(penirq, kbirq, dav);
s->ts.opaque = s->ts.chip->opaque;
s->ts.txrx = tsc210x_txrx;
static void n810_kbd_setup(struct n800_s *s)
{
qemu_irq kbd_irq = omap2_gpio_in_get(s->cpu->gpif, N810_KEYBOARD_GPIO)[0];
+ DeviceState *dev;
int i;
for (i = 0; i < 0x80; i ++)
/* Attach the LM8322 keyboard to the I2C bus,
* should happen in n8x0_i2c_setup and s->kbd be initialised here. */
- s->kbd = lm8323_init(s->i2c, kbd_irq);
- i2c_set_slave_address(s->kbd, N810_LM8323_ADDR);
+ dev = i2c_create_slave(s->i2c, "lm8323", N810_LM8323_ADDR);
+ qdev_connect_gpio_out(dev, 0, kbd_irq);
}
/* LCD MIPI DBI-C controller (URAL) */
uint8_t ret;
if (len > 9)
- cpu_abort(cpu_single_env, "%s: FIXME: bad SPI word width %i\n",
- __FUNCTION__, len);
+ hw_error("%s: FIXME: bad SPI word width %i\n", __FUNCTION__, len);
if (s->p >= ARRAY_SIZE(s->resp))
ret = 0;
fb_blank = memset(qemu_malloc(800 * 480 * 2), 0xff, 800 * 480 * 2);
/* Display Memory Data Port */
chip->block(chip->opaque, 1, fb_blank, 800 * 480 * 2, 800);
- free(fb_blank);
+ qemu_free(fb_blank);
}
-static void n8x0_dss_setup(struct n800_s *s, DisplayState *ds)
+static void n8x0_dss_setup(struct n800_s *s)
{
- s->blizzard.opaque = s1d13745_init(0, ds);
+ s->blizzard.opaque = s1d13745_init(NULL);
s->blizzard.block = s1d13745_write_block;
s->blizzard.write = s1d13745_write;
s->blizzard.read = s1d13745_read;
qemu_irq retu_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_RETU_GPIO)[0];
qemu_irq tahvo_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_TAHVO_GPIO)[0];
- struct cbus_s *cbus = cbus_init(dat_out);
+ CBus *cbus = cbus_init(dat_out);
omap2_gpio_out_set(s->cpu->gpif, N8X0_CBUS_CLK_GPIO, cbus->clk);
omap2_gpio_out_set(s->cpu->gpif, N8X0_CBUS_DAT_GPIO, cbus->dat);
{
qemu_irq tusb_irq = omap2_gpio_in_get(s->cpu->gpif, N8X0_TUSB_INT_GPIO)[0];
qemu_irq tusb_pwr = qemu_allocate_irqs(n8x0_usb_power_cb, s, 1)[0];
- struct tusb_s *tusb = tusb6010_init(tusb_irq);
+ TUSBState *tusb = tusb6010_init(tusb_irq);
/* Using the NOR interface */
omap_gpmc_attach(s->cpu->gpmc, N8X0_USB_ASYNC_CS,
- tusb6010_async_io(tusb), 0, 0, tusb);
+ tusb6010_async_io(tusb), NULL, NULL, tusb);
omap_gpmc_attach(s->cpu->gpmc, N8X0_USB_SYNC_CS,
- tusb6010_sync_io(tusb), 0, 0, tusb);
+ tusb6010_sync_io(tusb), NULL, NULL, tusb);
s->usb = tusb;
omap2_gpio_out_set(s->cpu->gpif, N8X0_TUSB_ENABLE_GPIO, tusb_pwr);
n800_dss_init(&s->blizzard);
/* CPU setup */
- s->cpu->env->regs[15] = s->cpu->env->boot_info->loader_start;
s->cpu->env->GE = 0x5;
/* If the machine has a slided keyboard, open it */
"headphone", N8X0_HEADPHONE_GPIO,
OMAP_GPIOSW_TYPE_CONNECTION | OMAP_GPIOSW_INVERTED,
},
- { 0 }
+ { NULL }
}, n810_gpiosw_info[] = {
{
"gps_reset", N810_GPS_RESET_GPIO,
"slide", N810_SLIDE_GPIO,
OMAP_GPIOSW_TYPE_COVER | OMAP_GPIOSW_INVERTED,
},
- { 0 }
+ { NULL }
};
static struct omap_partition_info_s {
{ 0x00280000, 0x00200000, 0x3, "initfs" },
{ 0x00480000, 0x0fb80000, 0x3, "rootfs" },
- { 0, 0, 0, 0 }
+ { 0, 0, 0, NULL }
}, n810_part_info[] = {
{ 0x00000000, 0x00020000, 0x3, "bootloader" },
{ 0x00020000, 0x00060000, 0x0, "config" },
{ 0x002a0000, 0x00400000, 0x0, "initfs" },
{ 0x006a0000, 0x0f960000, 0x0, "rootfs" },
- { 0, 0, 0, 0 }
+ { 0, 0, 0, NULL }
};
static bdaddr_t n8x0_bd_addr = {{ N8X0_BD_ADDR }};
}
static void n8x0_init(ram_addr_t ram_size, const char *boot_device,
- DisplayState *ds, const char *kernel_filename,
+ const char *kernel_filename,
const char *kernel_cmdline, const char *initrd_filename,
const char *cpu_model, struct arm_boot_info *binfo, int model)
{
struct n800_s *s = (struct n800_s *) qemu_mallocz(sizeof(*s));
int sdram_size = binfo->ram_size;
- int onenandram_size = 0x00010000;
+ DisplayState *ds;
- if (ram_size < sdram_size + onenandram_size + OMAP242X_SRAM_SIZE) {
- fprintf(stderr, "This architecture uses %i bytes of memory\n",
- sdram_size + onenandram_size + OMAP242X_SRAM_SIZE);
- exit(1);
- }
-
- s->cpu = omap2420_mpu_init(sdram_size, NULL, cpu_model);
+ s->cpu = omap2420_mpu_init(sdram_size, cpu_model);
/* Setup peripherals
*
n810_kbd_setup(s);
}
n8x0_spi_setup(s);
- n8x0_dss_setup(s, ds);
+ n8x0_dss_setup(s);
n8x0_cbus_setup(s);
n8x0_uart_setup(s);
if (usb_enabled)
n8x0_usb_setup(s);
- /* Setup initial (reset) machine state */
-
- /* Start at the OneNAND bootloader. */
- s->cpu->env->regs[15] = 0;
-
if (kernel_filename) {
/* Or at the linux loader. */
binfo->kernel_filename = kernel_filename;
arm_load_kernel(s->cpu->env, binfo);
qemu_register_reset(n8x0_boot_init, s);
- n8x0_boot_init(s);
}
- if (option_rom[0] && (boot_device[0] == 'n' || !kernel_filename)) {
+ if (option_rom[0].name && (boot_device[0] == 'n' || !kernel_filename)) {
+ int rom_size;
+ uint8_t nolo_tags[0x10000];
/* No, wait, better start at the ROM. */
s->cpu->env->regs[15] = OMAP2_Q2_BASE + 0x400000;
*
* The code above is for loading the `zImage' file from Nokia
* images. */
- printf("%i bytes of image loaded\n", load_image(option_rom[0],
- phys_ram_base + 0x400000));
+ rom_size = load_image_targphys(option_rom[0].name,
+ OMAP2_Q2_BASE + 0x400000,
+ sdram_size - 0x400000);
+ printf("%i bytes of image loaded\n", rom_size);
- n800_setup_nolo_tags(phys_ram_base + sdram_size);
+ n800_setup_nolo_tags(nolo_tags);
+ cpu_physical_memory_write(OMAP2_SRAM_BASE, nolo_tags, 0x10000);
}
/* FIXME: We shouldn't really be doing this here. The LCD controller
will set the size once configured, so this just sets an initial
size until the guest activates the display. */
- dpy_resize(ds, 800, 480);
+ ds = get_displaystate();
+ ds->surface = qemu_resize_displaysurface(ds, 800, 480);
+ dpy_resize(ds);
}
static struct arm_boot_info n800_binfo = {
.atag_board = n810_atag_setup,
};
-static void n800_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+static void n800_init(ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- return n8x0_init(ram_size, boot_device, ds,
+ return n8x0_init(ram_size, boot_device,
kernel_filename, kernel_cmdline, initrd_filename,
cpu_model, &n800_binfo, 800);
}
-static void n810_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+static void n810_init(ram_addr_t ram_size,
+ const char *boot_device,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
- return n8x0_init(ram_size, boot_device, ds,
+ return n8x0_init(ram_size, boot_device,
kernel_filename, kernel_cmdline, initrd_filename,
cpu_model, &n810_binfo, 810);
}
-QEMUMachine n800_machine = {
+static QEMUMachine n800_machine = {
.name = "n800",
.desc = "Nokia N800 tablet aka. RX-34 (OMAP2420)",
.init = n800_init,
- .ram_require = (0x08000000 + 0x00010000 + OMAP242X_SRAM_SIZE) |
- RAMSIZE_FIXED,
};
-QEMUMachine n810_machine = {
+static QEMUMachine n810_machine = {
.name = "n810",
.desc = "Nokia N810 tablet aka. RX-44 (OMAP2420)",
.init = n810_init,
- .ram_require = (0x08000000 + 0x00010000 + OMAP242X_SRAM_SIZE) |
- RAMSIZE_FIXED,
};
+
+static void nseries_machine_init(void)
+{
+ qemu_register_machine(&n800_machine);
+ qemu_register_machine(&n810_machine);
+}
+
+machine_init(nseries_machine_init);
projects / qemu.git / blobdiff