Remove io_index argument from cpu_register_io_memory()

[qemu.git] / hw / omap_dss.c

diff --git a/hw/omap_dss.c b/hw/omap_dss.c
index 8fcb19ccdf4f141fa6012105927f5a33b6bef1df..c69b91b9d713f4d2f6554dfd1d85600061b74245 100644 (file)
--- a/hw/omap_dss.c
+++ b/hw/omap_dss.c
@@ -14,10 +14,9 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  */
 #include "hw.h"
 #include "console.h"
@@ -583,25 +582,6 @@ static CPUWriteMemoryFunc *omap_disc1_writefn[] = {
     omap_disc_write,
 };
 
-static void *omap_rfbi_get_buffer(struct omap_dss_s *s)
-{
-    target_phys_addr_t fb;
-    uint32_t pd;
-
-    /* TODO */
-    fb = s->dispc.l[0].addr[0];
-
-    pd = cpu_get_physical_page_desc(fb);
-    if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM)
-        /* TODO */
-        cpu_abort(cpu_single_env, "%s: framebuffer outside RAM!\n",
-                        __FUNCTION__);
-    else
-        return phys_ram_base +
-                (pd & TARGET_PAGE_MASK) +
-                (fb & ~TARGET_PAGE_MASK);
-}
-
 static void omap_rfbi_transfer_stop(struct omap_dss_s *s)
 {
     if (!s->rfbi.busy)
@@ -615,8 +595,11 @@ static void omap_rfbi_transfer_stop(struct omap_dss_s *s)
 static void omap_rfbi_transfer_start(struct omap_dss_s *s)
 {
     void *data;
-    size_t len;
+    target_phys_addr_t len;
+    target_phys_addr_t data_addr;
     int pitch;
+    static void *bounce_buffer;
+    static target_phys_addr_t bounce_len;
 
     if (!s->rfbi.enable || s->rfbi.busy)
         return;
@@ -634,10 +617,24 @@ static void omap_rfbi_transfer_start(struct omap_dss_s *s)
 
     s->rfbi.busy = 1;
 
-    data = omap_rfbi_get_buffer(s);
+    len = s->rfbi.pixels * 2;
+
+    data_addr = s->dispc.l[0].addr[0];
+    data = cpu_physical_memory_map(data_addr, &len, 0);
+    if (data && len != s->rfbi.pixels * 2) {
+        cpu_physical_memory_unmap(data, len, 0, 0);
+        data = NULL;
+        len = s->rfbi.pixels * 2;
+    }
+    if (!data) {
+        if (len > bounce_len) {
+            bounce_buffer = qemu_realloc(bounce_buffer, len);
+        }
+        data = bounce_buffer;
+        cpu_physical_memory_read(data_addr, data, len);
+    }
 
     /* TODO bpp */
-    len = s->rfbi.pixels * 2;
     s->rfbi.pixels = 0;
 
     /* TODO: negative values */
@@ -648,6 +645,10 @@ static void omap_rfbi_transfer_start(struct omap_dss_s *s)
     if ((s->rfbi.control & (1 << 3)) && s->rfbi.chip[1])
         s->rfbi.chip[1]->block(s->rfbi.chip[1]->opaque, 1, data, len, pitch);
 
+    if (data != bounce_buffer) {
+        cpu_physical_memory_unmap(data, len, 0, len);
+    }
+
     omap_rfbi_transfer_stop(s);
 
     /* TODO */
@@ -1023,7 +1024,7 @@ static CPUWriteMemoryFunc *omap_im3_writefn[] = {
 };
 
 struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
-                target_phys_addr_t l3_base, DisplayState *ds,
+                target_phys_addr_t l3_base,
                 qemu_irq irq, qemu_irq drq,
                 omap_clk fck1, omap_clk fck2, omap_clk ck54m,
                 omap_clk ick1, omap_clk ick2)
@@ -1034,18 +1035,17 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
 
     s->irq = irq;
     s->drq = drq;
-    s->state = ds;
     omap_dss_reset(s);
 
-    iomemtype[0] = l4_register_io_memory(0, omap_diss1_readfn,
+    iomemtype[0] = l4_register_io_memory(omap_diss1_readfn,
                     omap_diss1_writefn, s);
-    iomemtype[1] = l4_register_io_memory(0, omap_disc1_readfn,
+    iomemtype[1] = l4_register_io_memory(omap_disc1_readfn,
                     omap_disc1_writefn, s);
-    iomemtype[2] = l4_register_io_memory(0, omap_rfbi1_readfn,
+    iomemtype[2] = l4_register_io_memory(omap_rfbi1_readfn,
                     omap_rfbi1_writefn, s);
-    iomemtype[3] = l4_register_io_memory(0, omap_venc1_readfn,
+    iomemtype[3] = l4_register_io_memory(omap_venc1_readfn,
                     omap_venc1_writefn, s);
-    iomemtype[4] = cpu_register_io_memory(0, omap_im3_readfn,
+    iomemtype[4] = cpu_register_io_memory(omap_im3_readfn,
                     omap_im3_writefn, s);
     omap_l4_attach(ta, 0, iomemtype[0]);
     omap_l4_attach(ta, 1, iomemtype[1]);
@@ -1054,9 +1054,8 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
     cpu_register_physical_memory(l3_base, 0x1000, iomemtype[4]);
 
 #if 0
-    if (ds)
-        graphic_console_init(ds, omap_update_display,
-                        omap_invalidate_display, omap_screen_dump, s);
+    s->state = graphic_console_init(omap_update_display,
+                                    omap_invalidate_display, omap_screen_dump, s);
 #endif
 
     return s;
@@ -1065,6 +1064,6 @@ struct omap_dss_s *omap_dss_init(struct omap_target_agent_s *ta,
 void omap_rfbi_attach(struct omap_dss_s *s, int cs, struct rfbi_chip_s *chip)
 {
     if (cs < 0 || cs > 1)
-        cpu_abort(cpu_single_env, "%s: wrong CS %i\n", __FUNCTION__, cs);
+        hw_error("%s: wrong CS %i\n", __FUNCTION__, cs);
     s->rfbi.chip[cs] = chip;
 }