static void power7_set_irq (void *opaque, int pin, int level)
{
CPUState *env = opaque;
- int cur_level;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
env, pin, level);
- cur_level = (env->irq_input_state >> pin) & 1;
switch (pin) {
case POWER7_INPUT_INT:
ppc_tb_t *tb_env = env->tb_env;
uint64_t tb;
+ if (kvm_enabled()) {
+ return env->spr[SPR_TBL];
+ }
+
tb = cpu_ppc_get_tb(tb_env, qemu_get_clock_ns(vm_clock), tb_env->tb_offset);
LOG_TB("%s: tb %016" PRIx64 "\n", __func__, tb);
uint32_t cpu_ppc_load_tbu (CPUState *env)
{
+ if (kvm_enabled()) {
+ return env->spr[SPR_TBU];
+ }
+
return _cpu_ppc_load_tbu(env);
}
{
ppc_tb_t *tb_env = env->tb_env;
+ if (kvm_enabled()) {
+ return env->spr[SPR_DECR];
+ }
+
return _cpu_ppc_load_decr(env, tb_env->decr_next);
}