int fpga_memory;
fpga = qemu_mallocz(sizeof(ref405ep_fpga_t));
- if (fpga != NULL) {
- fpga_memory = cpu_register_io_memory(0, ref405ep_fpga_read,
- ref405ep_fpga_write, fpga);
- cpu_register_physical_memory(base, 0x00000100, fpga_memory);
- ref405ep_fpga_reset(fpga);
- qemu_register_reset(&ref405ep_fpga_reset, fpga);
- }
+ fpga_memory = cpu_register_io_memory(0, ref405ep_fpga_read,
+ ref405ep_fpga_write, fpga);
+ cpu_register_physical_memory(base, 0x00000100, fpga_memory);
+ ref405ep_fpga_reset(fpga);
+ qemu_register_reset(&ref405ep_fpga_reset, fpga);
}
static void ref405ep_init (ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
int cpld_memory;
cpld = qemu_mallocz(sizeof(taihu_cpld_t));
- if (cpld != NULL) {
- cpld_memory = cpu_register_io_memory(0, taihu_cpld_read,
- taihu_cpld_write, cpld);
- cpu_register_physical_memory(base, 0x00000100, cpld_memory);
- taihu_cpld_reset(cpld);
- qemu_register_reset(&taihu_cpld_reset, cpld);
- }
+ cpld_memory = cpu_register_io_memory(0, taihu_cpld_read,
+ taihu_cpld_write, cpld);
+ cpu_register_physical_memory(base, 0x00000100, cpld_memory);
+ taihu_cpld_reset(cpld);
+ qemu_register_reset(&taihu_cpld_reset, cpld);
}
static void taihu_405ep_init(ram_addr_t ram_size, int vga_ram_size,
- const char *boot_device, DisplayState *ds,
+ const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,