/*
* QEMU PowerPC 405 evaluation boards emulation
- *
+ *
* Copyright (c) 2007 Jocelyn Mayer
- *
+ *
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
-#include "vl.h"
+#include "hw.h"
+#include "ppc.h"
#include "ppc405.h"
-
-extern int loglevel;
-extern FILE *logfile;
+#include "nvram.h"
+#include "flash.h"
+#include "sysemu.h"
+#include "block.h"
+#include "boards.h"
+#include "qemu-log.h"
#define BIOS_FILENAME "ppc405_rom.bin"
#undef BIOS_SIZE
*/
typedef struct ref405ep_fpga_t ref405ep_fpga_t;
struct ref405ep_fpga_t {
- uint32_t base;
uint8_t reg0;
uint8_t reg1;
};
uint32_t ret;
fpga = opaque;
- addr -= fpga->base;
switch (addr) {
case 0x0:
ret = fpga->reg0;
ref405ep_fpga_t *fpga;
fpga = opaque;
- addr -= fpga->base;
switch (addr) {
case 0x0:
/* Read only */
static void ref405ep_fpga_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
- ref405ep_fpga_writel(opaque, addr, (value >> 24) & 0xFF);
- ref405ep_fpga_writel(opaque, addr + 1, (value >> 16) & 0xFF);
- ref405ep_fpga_writel(opaque, addr + 2, (value >> 8) & 0xFF);
+ ref405ep_fpga_writeb(opaque, addr, (value >> 24) & 0xFF);
+ ref405ep_fpga_writeb(opaque, addr + 1, (value >> 16) & 0xFF);
+ ref405ep_fpga_writeb(opaque, addr + 2, (value >> 8) & 0xFF);
ref405ep_fpga_writeb(opaque, addr + 3, value & 0xFF);
}
int fpga_memory;
fpga = qemu_mallocz(sizeof(ref405ep_fpga_t));
- if (fpga != NULL) {
- fpga->base = base;
- fpga_memory = cpu_register_io_memory(0, ref405ep_fpga_read,
- ref405ep_fpga_write, fpga);
- cpu_register_physical_memory(base, 0x00000100, fpga_memory);
- ref405ep_fpga_reset(fpga);
- qemu_register_reset(&ref405ep_fpga_reset, fpga);
- }
+ fpga_memory = cpu_register_io_memory(0, ref405ep_fpga_read,
+ ref405ep_fpga_write, fpga);
+ cpu_register_physical_memory(base, 0x00000100, fpga_memory);
+ ref405ep_fpga_reset(fpga);
+ qemu_register_reset(&ref405ep_fpga_reset, fpga);
}
-static void ref405ep_init (int ram_size, int vga_ram_size, int boot_device,
- DisplayState *ds, const char **fd_filename,
- int snapshot,
- const char *kernel_filename,
+static void ref405ep_init (ram_addr_t ram_size, int vga_ram_size,
+ const char *boot_device,
+ const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
CPUPPCState *env;
qemu_irq *pic;
ram_addr_t sram_offset, bios_offset, bdloc;
- target_ulong ram_bases[2], ram_sizes[2];
+ target_phys_addr_t ram_bases[2], ram_sizes[2];
target_ulong sram_size, bios_size;
//int phy_addr = 0;
//static int phy_addr = 1;
target_ulong kernel_base, kernel_size, initrd_base, initrd_size;
int linux_boot;
int fl_idx, fl_sectors, len;
+ int ppc_boot_device = boot_device[0];
+ int index;
/* XXX: fix this */
ram_bases[0] = 0x00000000;
bios_offset = sram_offset + sram_size;
fl_idx = 0;
#ifdef USE_FLASH_BIOS
- if (pflash_table[fl_idx] != NULL) {
- bios_size = bdrv_getlength(pflash_table[fl_idx]);
+ index = drive_get_index(IF_PFLASH, 0, fl_idx);
+ if (index != -1) {
+ bios_size = bdrv_getlength(drives_table[index].bdrv);
fl_sectors = (bios_size + 65535) >> 16;
#ifdef DEBUG_BOARD_INIT
printf("Register parallel flash %d size " ADDRX " at offset %08lx "
" addr " ADDRX " '%s' %d\n",
fl_idx, bios_size, bios_offset, -bios_size,
- bdrv_get_device_name(pflash_table[fl_idx]), fl_sectors);
+ bdrv_get_device_name(drives_table[index].bdrv), fl_sectors);
#endif
- pflash_register(-(bios_size), bios_offset, pflash_table[fl_idx],
- 65536, fl_sectors, 2,
- 0x0001, 0x22DA, 0x0000, 0x0000);
+ pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
+ drives_table[index].bdrv, 65536, fl_sectors, 1,
+ 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
fl_idx++;
} else
#endif
#ifdef DEBUG_BOARD_INIT
printf("Load BIOS from file\n");
#endif
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
+ if (bios_name == NULL)
+ bios_name = BIOS_FILENAME;
+ snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bios_size = load_image(buf, phys_ram_base + bios_offset);
if (bios_size < 0 || bios_size > BIOS_SIZE) {
fprintf(stderr, "qemu: could not load PowerPC bios '%s'\n", buf);
exit(1);
}
bios_size = (bios_size + 0xfff) & ~0xfff;
- cpu_register_physical_memory((uint32_t)(-bios_size),
+ cpu_register_physical_memory((uint32_t)(-bios_size),
bios_size, bios_offset | IO_MEM_ROM);
}
bios_offset += bios_size;
memset(&bd, 0, sizeof(bd));
bd.bi_memstart = 0x00000000;
bd.bi_memsize = ram_size;
- bd.bi_flashstart = -(bios_size);
+ bd.bi_flashstart = -bios_size;
bd.bi_flashsize = -bios_size;
bd.bi_flashoffset = 0;
bd.bi_sramstart = 0xFFF00000;
bd.bi_plb_busfreq = 33333333;
bd.bi_pci_busfreq = 33333333;
bd.bi_opbfreq = 33333333;
- bdloc = ppc405_set_bootinfo(env, &bd);
+ bdloc = ppc405_set_bootinfo(env, &bd, 0x00000001);
env->gpr[3] = bdloc;
kernel_base = KERNEL_LOAD_ADDR;
/* now we can load the kernel */
kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
if (kernel_size < 0) {
- fprintf(stderr, "qemu: could not load kernel '%s'\n",
+ fprintf(stderr, "qemu: could not load kernel '%s'\n",
kernel_filename);
exit(1);
}
initrd_size = load_image(initrd_filename,
phys_ram_base + initrd_base);
if (initrd_size < 0) {
- fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
+ fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
initrd_filename);
exit(1);
}
}
env->gpr[4] = initrd_base;
env->gpr[5] = initrd_size;
- boot_device = 'm';
+ ppc_boot_device = 'm';
if (kernel_cmdline != NULL) {
len = strlen(kernel_cmdline);
bdloc -= ((len + 255) & ~255);
}
QEMUMachine ref405ep_machine = {
- "ref405ep",
- "ref405ep",
- ref405ep_init,
+ .name = "ref405ep",
+ .desc = "ref405ep",
+ .init = ref405ep_init,
+ .ram_require = (128 * 1024 * 1024 + 4096 + 512 * 1024 + BIOS_SIZE) | RAMSIZE_FIXED,
};
/*****************************************************************************/
*/
typedef struct taihu_cpld_t taihu_cpld_t;
struct taihu_cpld_t {
- uint32_t base;
uint8_t reg0;
uint8_t reg1;
};
uint32_t ret;
cpld = opaque;
- addr -= cpld->base;
switch (addr) {
case 0x0:
ret = cpld->reg0;
taihu_cpld_t *cpld;
cpld = opaque;
- addr -= cpld->base;
switch (addr) {
case 0x0:
/* Read only */
int cpld_memory;
cpld = qemu_mallocz(sizeof(taihu_cpld_t));
- if (cpld != NULL) {
- cpld->base = base;
- cpld_memory = cpu_register_io_memory(0, taihu_cpld_read,
- taihu_cpld_write, cpld);
- cpu_register_physical_memory(base, 0x00000100, cpld_memory);
- taihu_cpld_reset(cpld);
- qemu_register_reset(&taihu_cpld_reset, cpld);
- }
+ cpld_memory = cpu_register_io_memory(0, taihu_cpld_read,
+ taihu_cpld_write, cpld);
+ cpu_register_physical_memory(base, 0x00000100, cpld_memory);
+ taihu_cpld_reset(cpld);
+ qemu_register_reset(&taihu_cpld_reset, cpld);
}
-static void taihu_405ep_init(int ram_size, int vga_ram_size, int boot_device,
- DisplayState *ds, const char **fd_filename,
- int snapshot,
- const char *kernel_filename,
+static void taihu_405ep_init(ram_addr_t ram_size, int vga_ram_size,
+ const char *boot_device,
+ const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
CPUPPCState *env;
qemu_irq *pic;
ram_addr_t bios_offset;
- target_ulong ram_bases[2], ram_sizes[2];
+ target_phys_addr_t ram_bases[2], ram_sizes[2];
target_ulong bios_size;
target_ulong kernel_base, kernel_size, initrd_base, initrd_size;
int linux_boot;
int fl_idx, fl_sectors;
-
+ int ppc_boot_device = boot_device[0];
+ int index;
+
/* RAM is soldered to the board so the size cannot be changed */
ram_bases[0] = 0x00000000;
ram_sizes[0] = 0x04000000;
#endif
fl_idx = 0;
#if defined(USE_FLASH_BIOS)
- if (pflash_table[fl_idx] != NULL) {
- bios_size = bdrv_getlength(pflash_table[fl_idx]);
+ index = drive_get_index(IF_PFLASH, 0, fl_idx);
+ if (index != -1) {
+ bios_size = bdrv_getlength(drives_table[index].bdrv);
/* XXX: should check that size is 2MB */
// bios_size = 2 * 1024 * 1024;
fl_sectors = (bios_size + 65535) >> 16;
printf("Register parallel flash %d size " ADDRX " at offset %08lx "
" addr " ADDRX " '%s' %d\n",
fl_idx, bios_size, bios_offset, -bios_size,
- bdrv_get_device_name(pflash_table[fl_idx]), fl_sectors);
+ bdrv_get_device_name(drives_table[index].bdrv), fl_sectors);
#endif
- pflash_register(-(bios_size), bios_offset, pflash_table[fl_idx],
- 65536, fl_sectors, 4,
- 0x0001, 0x22DA, 0x0000, 0x0000);
+ pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
+ drives_table[index].bdrv, 65536, fl_sectors, 1,
+ 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
fl_idx++;
} else
#endif
#ifdef DEBUG_BOARD_INIT
printf("Load BIOS from file\n");
#endif
- snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
+ if (bios_name == NULL)
+ bios_name = BIOS_FILENAME;
+ snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bios_size = load_image(buf, phys_ram_base + bios_offset);
if (bios_size < 0 || bios_size > BIOS_SIZE) {
fprintf(stderr, "qemu: could not load PowerPC bios '%s'\n", buf);
exit(1);
}
bios_size = (bios_size + 0xfff) & ~0xfff;
- cpu_register_physical_memory((uint32_t)(-bios_size),
+ cpu_register_physical_memory((uint32_t)(-bios_size),
bios_size, bios_offset | IO_MEM_ROM);
}
bios_offset += bios_size;
/* Register Linux flash */
- if (pflash_table[fl_idx] != NULL) {
- bios_size = bdrv_getlength(pflash_table[fl_idx]);
+ index = drive_get_index(IF_PFLASH, 0, fl_idx);
+ if (index != -1) {
+ bios_size = bdrv_getlength(drives_table[index].bdrv);
/* XXX: should check that size is 32MB */
bios_size = 32 * 1024 * 1024;
fl_sectors = (bios_size + 65535) >> 16;
printf("Register parallel flash %d size " ADDRX " at offset %08lx "
" addr " ADDRX " '%s'\n",
fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000,
- bdrv_get_device_name(pflash_table[fl_idx]));
+ bdrv_get_device_name(drives_table[index].bdrv));
#endif
- pflash_register(0xfc000000, bios_offset, pflash_table[fl_idx],
- 65536, fl_sectors, 4,
- 0x0001, 0x22DA, 0x0000, 0x0000);
+ pflash_cfi02_register(0xfc000000, bios_offset,
+ drives_table[index].bdrv, 65536, fl_sectors, 1,
+ 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
fl_idx++;
}
/* Register CLPD & LCD display */
/* now we can load the kernel */
kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
if (kernel_size < 0) {
- fprintf(stderr, "qemu: could not load kernel '%s'\n",
+ fprintf(stderr, "qemu: could not load kernel '%s'\n",
kernel_filename);
exit(1);
}
phys_ram_base + initrd_base);
if (initrd_size < 0) {
fprintf(stderr,
- "qemu: could not load initial ram disk '%s'\n",
+ "qemu: could not load initial ram disk '%s'\n",
initrd_filename);
exit(1);
}
initrd_base = 0;
initrd_size = 0;
}
- boot_device = 'm';
+ ppc_boot_device = 'm';
} else {
kernel_base = 0;
kernel_size = 0;
"taihu",
"taihu",
taihu_405ep_init,
+ (128 * 1024 * 1024 + 4096 + BIOS_SIZE + 32 * 1024 * 1024) | RAMSIZE_FIXED,
};
projects / qemu.git / blobdiff