#include "qemu-common.h"
#include "net.h"
#include "hw.h"
-#include "pci.h"
+#include "pci/pci.h"
#include "boards.h"
#include "kvm.h"
#include "kvm_ppc.h"
#include "loader.h"
#include "elf.h"
#include "exec-memory.h"
-#include "pc.h"
+#include "serial.h"
#include "ppc.h"
#include "ppc405.h"
#include "sysemu.h"
256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0
};
-static target_phys_addr_t entry;
+static hwaddr entry;
-static int bamboo_load_device_tree(target_phys_addr_t addr,
+static int bamboo_load_device_tree(hwaddr addr,
uint32_t ramsize,
- target_phys_addr_t initrd_base,
- target_phys_addr_t initrd_size,
+ hwaddr initrd_base,
+ hwaddr initrd_size,
const char *kernel_cmdline)
{
int ret = -1;
#ifdef CONFIG_FDT
- uint32_t mem_reg_property[] = { 0, 0, ramsize };
+ uint32_t mem_reg_property[] = { 0, 0, cpu_to_be32(ramsize) };
char *filename;
int fdt_size;
void *fdt;
/* Create reset TLB entries for BookE, spanning the 32bit addr space. */
static void mmubooke_create_initial_mapping(CPUPPCState *env,
target_ulong va,
- target_phys_addr_t pa)
+ hwaddr pa)
{
ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
mmubooke_create_initial_mapping(env, 0, 0);
}
-static void bamboo_init(ram_addr_t ram_size,
- const char *boot_device,
- const char *kernel_filename,
- const char *kernel_cmdline,
- const char *initrd_filename,
- const char *cpu_model)
+static void bamboo_init(QEMUMachineInitArgs *args)
{
+ ram_addr_t ram_size = args->ram_size;
+ const char *cpu_model = args->cpu_model;
+ const char *kernel_filename = args->kernel_filename;
+ const char *kernel_cmdline = args->kernel_cmdline;
+ const char *initrd_filename = args->initrd_filename;
unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 };
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram_memories
= g_malloc(PPC440EP_SDRAM_NR_BANKS * sizeof(*ram_memories));
- target_phys_addr_t ram_bases[PPC440EP_SDRAM_NR_BANKS];
- target_phys_addr_t ram_sizes[PPC440EP_SDRAM_NR_BANKS];
+ hwaddr ram_bases[PPC440EP_SDRAM_NR_BANKS];
+ hwaddr ram_sizes[PPC440EP_SDRAM_NR_BANKS];
qemu_irq *pic;
qemu_irq *irqs;
PCIBus *pcibus;
CPUPPCState *env;
uint64_t elf_entry;
uint64_t elf_lowaddr;
- target_phys_addr_t loadaddr = 0;
+ hwaddr loadaddr = 0;
target_long initrd_size = 0;
DeviceState *dev;
int success;