#include "net.h"
#include "isa.h"
#include "pci.h"
+#include "usb-ohci.h"
#include "boards.h"
#include "fw_cfg.h"
#include "escc.h"
#include "ide.h"
#include "loader.h"
#include "elf.h"
+#include "kvm.h"
#define MAX_IDE_BUS 2
#define VGA_BIOS_SIZE 65536
return 0;
}
-static void ppc_heathrow_init (a_ram_addr ram_size,
+static void ppc_heathrow_init (ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
char *filename;
qemu_irq *pic, **heathrow_irqs;
int linux_boot, i;
- a_ram_addr ram_offset, bios_offset, vga_bios_offset;
+ ram_addr_t ram_offset, bios_offset, vga_bios_offset;
uint32_t kernel_base, initrd_base;
int32_t kernel_size, initrd_size;
PCIBus *pci_bus;
/* Set time-base frequency to 16.6 Mhz */
cpu_ppc_tb_init(env, 16600000UL);
env->osi_call = vga_osi_call;
- qemu_register_reset(&cpu_ppc_reset, env);
+ qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
envs[i] = env;
}
+ /* Make sure all register sets take effect */
+ cpu_synchronize_state(env);
+
/* allocate RAM */
if (ram_size > (2047 << 20)) {
fprintf(stderr,
serial_hds[1], ESCC_CLOCK, 4);
for(i = 0; i < nb_nics; i++)
- pci_nic_init(&nd_table[i], "ne2k_pci", NULL);
+ pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
if (kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
- pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
+ pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
}