ehci: Add support for packets with both data and an error status

[qemu.git] / hw / primecell.h

diff --git a/hw/primecell.h b/hw/primecell.h
index 714fc785ed851c4f69ebd6f4e9ff3a71f672f6d2..7337c3b3ca0a9aee421d21a611b59856f97eb262 100644 (file)
--- a/hw/primecell.h
+++ b/hw/primecell.h
@@ -5,45 +5,8 @@
 /* Also includes some devices that are currently only used by the
    ARM boards.  */
 
-/* pl031.c */
-void pl031_init(uint32_t base, qemu_irq irq);
-
-/* pl022.c */
-typedef int (*ssi_xfer_cb)(void *, int);
-void pl022_init(uint32_t base, qemu_irq irq, ssi_xfer_cb xfer_cb,
-                void *opaque);
-
-/* pl050.c */
-void pl050_init(uint32_t base, qemu_irq irq, int is_mouse);
-
-/* pl061.c */
-void pl061_float_high(void *opaque, uint8_t mask);
-qemu_irq *pl061_init(uint32_t base, qemu_irq irq, qemu_irq **out);
-
-/* pl080.c */
-void *pl080_init(uint32_t base, qemu_irq irq, int nchannels);
-
-/* pl181.c */
-void pl181_init(uint32_t base, BlockDriverState *bd,
-                qemu_irq irq0, qemu_irq irq1);
-
-/* pl190.c */
-qemu_irq *pl190_init(uint32_t base, qemu_irq irq, qemu_irq fiq);
-
-/* realview_gic.c */
-qemu_irq *realview_gic_init(uint32_t base, qemu_irq parent_irq);
-
-/* mpcore.c */
-extern qemu_irq *mpcore_irq_init(qemu_irq *cpu_irq);
-
-/* arm-timer.c */
-void sp804_init(uint32_t base, qemu_irq irq);
-void icp_pit_init(uint32_t base, qemu_irq *pic, int irq);
-
-/* arm_sysctl.c */
-void arm_sysctl_init(uint32_t base, uint32_t sys_id);
-
-/* versatile_pci.c */
-PCIBus *pci_vpb_init(qemu_irq *pic, int irq, int realview);
+/* arm_sysctl GPIO lines */
+#define ARM_SYSCTL_GPIO_MMC_WPROT 0
+#define ARM_SYSCTL_GPIO_MMC_CARDIN 1
 
 #endif