* Written by Andrzej Zaborowski <balrog@zabor.org>
*
* This code is licensed under the GPLv2.
+ *
+ * Contributions after 2012-01-13 are licensed under the terms of the
+ * GNU GPL, version 2 or (at your option) any later version.
*/
#include "hw.h"
#include "qdev.h"
struct PXA2xxMMCIState {
+ MemoryRegion iomem;
qemu_irq irq;
qemu_irq rx_dma;
qemu_irq tx_dma;
return pxa2xx_mmci_read(opaque, offset);
}
-static CPUReadMemoryFunc * const pxa2xx_mmci_readfn[] = {
- pxa2xx_mmci_readb,
- pxa2xx_mmci_readh,
- pxa2xx_mmci_readw
-};
-
static void pxa2xx_mmci_writeb(void *opaque,
target_phys_addr_t offset, uint32_t value)
{
pxa2xx_mmci_write(opaque, offset, value);
}
-static CPUWriteMemoryFunc * const pxa2xx_mmci_writefn[] = {
- pxa2xx_mmci_writeb,
- pxa2xx_mmci_writeh,
- pxa2xx_mmci_writew
+static const MemoryRegionOps pxa2xx_mmci_ops = {
+ .old_mmio = {
+ .read = { pxa2xx_mmci_readb,
+ pxa2xx_mmci_readh,
+ pxa2xx_mmci_readw, },
+ .write = { pxa2xx_mmci_writeb,
+ pxa2xx_mmci_writeh,
+ pxa2xx_mmci_writew, },
+ },
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
static void pxa2xx_mmci_save(QEMUFile *f, void *opaque)
return 0;
}
-PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base,
+PXA2xxMMCIState *pxa2xx_mmci_init(MemoryRegion *sysmem,
+ target_phys_addr_t base,
BlockDriverState *bd, qemu_irq irq,
qemu_irq rx_dma, qemu_irq tx_dma)
{
- int iomemtype;
PXA2xxMMCIState *s;
s = (PXA2xxMMCIState *) g_malloc0(sizeof(PXA2xxMMCIState));
s->rx_dma = rx_dma;
s->tx_dma = tx_dma;
- iomemtype = cpu_register_io_memory(pxa2xx_mmci_readfn,
- pxa2xx_mmci_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, 0x00100000, iomemtype);
+ memory_region_init_io(&s->iomem, &pxa2xx_mmci_ops, s,
+ "pxa2xx-mmci", 0x00100000);
+ memory_region_add_subregion(sysmem, base, &s->iomem);
/* Instantiate the actual storage */
s->card = sd_init(bd, 0);