Version 1.0.1

[qemu.git] / hw / realview_gic.c

diff --git a/hw/realview_gic.c b/hw/realview_gic.c
index cbc961491c37f17c9d87db223af812ee0875d9c6..cd6a44d9d0a4506494ca2fa38a32c79bb6605509 100644 (file)
--- a/hw/realview_gic.c
+++ b/hw/realview_gic.c
@@ -4,11 +4,10 @@
  * Copyright (c) 2006-2007 CodeSourcery.
  * Written by Paul Brook
  *
- * This code is licenced under the GPL.
+ * This code is licensed under the GPL.
  */
 
-#include "vl.h"
-#include "arm_pic.h"
+#include "sysbus.h"
 
 #define GIC_NIRQ 96
 #define NCPU 1
@@ -22,43 +21,55 @@ gic_get_current_cpu(void)
 
 #include "arm_gic.c"
 
-static uint32_t realview_gic_cpu_read(void *opaque, target_phys_addr_t offset)
+typedef struct {
+    gic_state gic;
+    MemoryRegion iomem;
+    MemoryRegion container;
+} RealViewGICState;
+
+static uint64_t realview_gic_cpu_read(void *opaque, target_phys_addr_t offset,
+                                      unsigned size)
 {
     gic_state *s = (gic_state *)opaque;
-    offset -= s->base;
     return gic_cpu_read(s, gic_get_current_cpu(), offset);
 }
 
 static void realview_gic_cpu_write(void *opaque, target_phys_addr_t offset,
-                          uint32_t value)
+                                   uint64_t value, unsigned size)
 {
     gic_state *s = (gic_state *)opaque;
-    offset -= s->base;
     gic_cpu_write(s, gic_get_current_cpu(), offset, value);
 }
 
-static CPUReadMemoryFunc *realview_gic_cpu_readfn[] = {
-   realview_gic_cpu_read,
-   realview_gic_cpu_read,
-   realview_gic_cpu_read
+static const MemoryRegionOps realview_gic_cpu_ops = {
+    .read = realview_gic_cpu_read,
+    .write = realview_gic_cpu_write,
+    .endianness = DEVICE_NATIVE_ENDIAN,
 };
 
-static CPUWriteMemoryFunc *realview_gic_cpu_writefn[] = {
-   realview_gic_cpu_write,
-   realview_gic_cpu_write,
-   realview_gic_cpu_write
-};
+static void realview_gic_map_setup(RealViewGICState *s)
+{
+    memory_region_init(&s->container, "realview-gic-container", 0x2000);
+    memory_region_init_io(&s->iomem, &realview_gic_cpu_ops, &s->gic,
+                          "realview-gic", 0x1000);
+    memory_region_add_subregion(&s->container, 0, &s->iomem);
+    memory_region_add_subregion(&s->container, 0x1000, &s->gic.iomem);
+}
 
-qemu_irq *realview_gic_init(uint32_t base, qemu_irq parent_irq)
+static int realview_gic_init(SysBusDevice *dev)
 {
-    gic_state *s;
-    int iomemtype;
+    RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);
 
-    s = gic_init(base, &parent_irq);
-    if (!s)
-        return NULL;
-    iomemtype = cpu_register_io_memory(0, realview_gic_cpu_readfn,
-                                       realview_gic_cpu_writefn, s);
-    cpu_register_physical_memory(base, 0x00001000, iomemtype);
-    return s->in;
+    gic_init(&s->gic);
+    realview_gic_map_setup(s);
+    sysbus_init_mmio_region(dev, &s->container);
+    return 0;
 }
+
+static void realview_gic_register_devices(void)
+{
+    sysbus_register_dev("realview_gic", sizeof(RealViewGICState),
+                        realview_gic_init);
+}
+
+device_init(realview_gic_register_devices)