}
}
- assert(0);
+ abort();
}
#define INTC_MODE_NONE 0
}
}
- assert(0);
+ abort();
}
static void sh_intc_toggle_mask(struct intc_desc *desc, intc_enum id,
case INTC_MODE_ENABLE_REG | INTC_MODE_IS_PRIO: break;
case INTC_MODE_DUAL_SET: value |= *valuep; break;
case INTC_MODE_DUAL_CLR: value = *valuep & ~value; break;
- default: assert(0);
+ default: abort();
}
for (k = 0; k <= first; k++) {
#endif
}
-static CPUReadMemoryFunc *sh_intc_readfn[] = {
+static CPUReadMemoryFunc * const sh_intc_readfn[] = {
sh_intc_read,
sh_intc_read,
sh_intc_read
};
-static CPUWriteMemoryFunc *sh_intc_writefn[] = {
+static CPUWriteMemoryFunc * const sh_intc_writefn[] = {
sh_intc_write,
sh_intc_write,
sh_intc_write
desc->nr_prio_regs = nr_prio_regs;
i = sizeof(struct intc_source) * nr_sources;
- desc->sources = qemu_malloc(i);
+ desc->sources = qemu_mallocz(i);
- memset(desc->sources, 0, i);
for (i = 0; i < desc->nr_sources; i++) {
struct intc_source *source = desc->sources + i;
desc->irqs = qemu_allocate_irqs(sh_intc_set_irq, desc, nr_sources);
desc->iomemtype = cpu_register_io_memory(sh_intc_readfn,
- sh_intc_writefn, desc);
+ sh_intc_writefn, desc,
+ DEVICE_NATIVE_ENDIAN);
if (desc->mask_regs) {
for (i = 0; i < desc->nr_mask_regs; i++) {
struct intc_mask_reg *mr = desc->mask_regs + i;