* This code is licensed under the GNU GPL v2.
*/
#include "hw.h"
-#include "pxa.h"
#include "devices.h"
#include "flash.h"
#include "console.h"
case NAND_DATA + 2:
case NAND_DATA + 3:
nand_setio(s->flash, value);
- s->nand.isr &= 1;
+ s->nand.isr |= 1;
tc6393xb_nand_irq(s);
return;
case NAND_MODE:
{
int iomemtype;
TC6393xbState *s;
- CPUReadMemoryFunc *tc6393xb_readfn[] = {
+ CPUReadMemoryFunc * const tc6393xb_readfn[] = {
tc6393xb_readb,
tc6393xb_readw,
tc6393xb_readl,
};
- CPUWriteMemoryFunc *tc6393xb_writefn[] = {
+ CPUWriteMemoryFunc * const tc6393xb_writefn[] = {
tc6393xb_writeb,
tc6393xb_writew,
tc6393xb_writel,
s->flash = nand_init(NAND_MFR_TOSHIBA, 0x76);
iomemtype = cpu_register_io_memory(tc6393xb_readfn,
- tc6393xb_writefn, s);
+ tc6393xb_writefn, s, DEVICE_NATIVE_ENDIAN);
cpu_register_physical_memory(base, 0x10000, iomemtype);
- s->vram_addr = qemu_ram_alloc(0x100000);
+ s->vram_addr = qemu_ram_alloc(NULL, "tc6393xb.vram", 0x100000);
s->vram_ptr = qemu_get_ram_ptr(s->vram_addr);
cpu_register_physical_memory(base + 0x100000, 0x100000, s->vram_addr);
s->scr_width = 480;