#include "devices.h"
#include "net.h"
#include "sysemu.h"
-#include "pci.h"
-#include "usb-ohci.h"
+#include "pci/pci.h"
+#include "i2c.h"
#include "boards.h"
#include "blockdev.h"
#include "exec-memory.h"
+#include "flash.h"
+
+#define VERSATILE_FLASH_ADDR 0x34000000
+#define VERSATILE_FLASH_SIZE (64 * 1024 * 1024)
+#define VERSATILE_FLASH_SECT_SIZE (256 * 1024)
/* Primary interrupt controller. */
vpb_sic_update(s);
}
-static uint64_t vpb_sic_read(void *opaque, target_phys_addr_t offset,
+static uint64_t vpb_sic_read(void *opaque, hwaddr offset,
unsigned size)
{
vpb_sic_state *s = (vpb_sic_state *)opaque;
}
}
-static void vpb_sic_write(void *opaque, target_phys_addr_t offset,
+static void vpb_sic_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
vpb_sic_state *s = (vpb_sic_state *)opaque;
/* Board init. */
/* The AB and PB boards both use the same core, just with different
- peripherans and expansion busses. For now we emulate a subset of the
+ peripherals and expansion busses. For now we emulate a subset of the
PB peripherals and just change the board ID. */
static struct arm_boot_info versatile_binfo;
-static void versatile_init(ram_addr_t ram_size,
- const char *boot_device,
- const char *kernel_filename, const char *kernel_cmdline,
- const char *initrd_filename, const char *cpu_model,
- int board_id)
+static void versatile_init(QEMUMachineInitArgs *args, int board_id)
{
- CPUState *env;
+ ARMCPU *cpu;
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
qemu_irq *cpu_pic;
DeviceState *pl041;
PCIBus *pci_bus;
NICInfo *nd;
+ i2c_bus *i2c;
int n;
int done_smc = 0;
+ DriveInfo *dinfo;
- if (!cpu_model)
- cpu_model = "arm926";
- env = cpu_init(cpu_model);
- if (!env) {
+ if (!args->cpu_model) {
+ args->cpu_model = "arm926";
+ }
+ cpu = cpu_arm_init(args->cpu_model);
+ if (!cpu) {
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
- memory_region_init_ram(ram, "versatile.ram", ram_size);
+ memory_region_init_ram(ram, "versatile.ram", args->ram_size);
vmstate_register_ram_global(ram);
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */
qdev_init_nofail(sysctl);
sysbus_mmio_map(sysbus_from_qdev(sysctl), 0, 0x10000000);
- cpu_pic = arm_pic_init_cpu(env);
+ cpu_pic = arm_pic_init_cpu(cpu);
dev = sysbus_create_varargs("pl190", 0x10140000,
- cpu_pic[0], cpu_pic[1], NULL);
+ cpu_pic[ARM_PIC_CPU_IRQ],
+ cpu_pic[ARM_PIC_CPU_FIQ], NULL);
for (n = 0; n < 32; n++) {
pic[n] = qdev_get_gpio_in(dev, n);
}
pci_nic_init_nofail(nd, "rtl8139", NULL);
}
}
- if (usb_enabled) {
- usb_ohci_init_pci(pci_bus, -1);
+ if (usb_enabled(false)) {
+ pci_create_simple(pci_bus, -1, "pci-ohci");
}
n = drive_get_max_bus(IF_SCSI);
while (n >= 0) {
sysbus_create_simple("sp804", 0x101e2000, pic[4]);
sysbus_create_simple("sp804", 0x101e3000, pic[5]);
+ sysbus_create_simple("pl061", 0x101e4000, pic[6]);
+ sysbus_create_simple("pl061", 0x101e5000, pic[7]);
+ sysbus_create_simple("pl061", 0x101e6000, pic[8]);
+ sysbus_create_simple("pl061", 0x101e7000, pic[9]);
+
/* The versatile/PB actually has a modified Color LCD controller
that includes hardware cursor support from the PL111. */
dev = sysbus_create_simple("pl110_versatile", 0x10120000, pic[16]);
/* Add PL031 Real Time Clock. */
sysbus_create_simple("pl031", 0x101e8000, pic[10]);
+ dev = sysbus_create_simple("versatile_i2c", 0x10002000, NULL);
+ i2c = (i2c_bus *)qdev_get_child_bus(dev, "i2c");
+ i2c_create_slave(i2c, "ds1338", 0x68);
+
/* Add PL041 AACI Interface to the LM4549 codec */
pl041 = qdev_create(NULL, "pl041");
qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
/* 0x101f2000 UART1. */
/* 0x101f3000 UART2. */
/* 0x101f4000 SSPI. */
+ /* 0x34000000 NOR Flash */
+
+ dinfo = drive_get(IF_PFLASH, 0, 0);
+ if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, NULL, "versatile.flash",
+ VERSATILE_FLASH_SIZE, dinfo ? dinfo->bdrv : NULL,
+ VERSATILE_FLASH_SECT_SIZE,
+ VERSATILE_FLASH_SIZE / VERSATILE_FLASH_SECT_SIZE,
+ 4, 0x0089, 0x0018, 0x0000, 0x0, 0)) {
+ fprintf(stderr, "qemu: Error registering flash memory.\n");
+ }
- versatile_binfo.ram_size = ram_size;
- versatile_binfo.kernel_filename = kernel_filename;
- versatile_binfo.kernel_cmdline = kernel_cmdline;
- versatile_binfo.initrd_filename = initrd_filename;
+ versatile_binfo.ram_size = args->ram_size;
+ versatile_binfo.kernel_filename = args->kernel_filename;
+ versatile_binfo.kernel_cmdline = args->kernel_cmdline;
+ versatile_binfo.initrd_filename = args->initrd_filename;
versatile_binfo.board_id = board_id;
- arm_load_kernel(env, &versatile_binfo);
+ arm_load_kernel(cpu, &versatile_binfo);
}
-static void vpb_init(ram_addr_t ram_size,
- const char *boot_device,
- const char *kernel_filename, const char *kernel_cmdline,
- const char *initrd_filename, const char *cpu_model)
+static void vpb_init(QEMUMachineInitArgs *args)
{
- versatile_init(ram_size,
- boot_device,
- kernel_filename, kernel_cmdline,
- initrd_filename, cpu_model, 0x183);
+ versatile_init(args, 0x183);
}
-static void vab_init(ram_addr_t ram_size,
- const char *boot_device,
- const char *kernel_filename, const char *kernel_cmdline,
- const char *initrd_filename, const char *cpu_model)
+static void vab_init(QEMUMachineInitArgs *args)
{
- versatile_init(ram_size,
- boot_device,
- kernel_filename, kernel_cmdline,
- initrd_filename, cpu_model, 0x25e);
+ versatile_init(args, 0x25e);
}
static QEMUMachine versatilepb_machine = {
projects / qemu.git / blobdiff