usb-ehci: Connect Status bit is read only, don't allow changing it by the guest

[qemu.git] / hw / versatilepb.c

diff --git a/hw/versatilepb.c b/hw/versatilepb.c
index 415111974e24f3f13ce3c7c2a2305f3e264d92c3..46b6a3f383e9249950c2877a5999d8c541f4dac9 100644 (file)
--- a/hw/versatilepb.c
+++ b/hw/versatilepb.c
@@ -14,7 +14,9 @@
 #include "net.h"
 #include "sysemu.h"
 #include "pci.h"
+#include "usb-ohci.h"
 #include "boards.h"
+#include "blockdev.h"
 
 /* Primary interrupt controller.  */
 
@@ -28,6 +30,18 @@ typedef struct vpb_sic_state
   int irq;
 } vpb_sic_state;
 
+static const VMStateDescription vmstate_vpb_sic = {
+    .name = "versatilepb_sic",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .fields = (VMStateField[]) {
+        VMSTATE_UINT32(level, vpb_sic_state),
+        VMSTATE_UINT32(mask, vpb_sic_state),
+        VMSTATE_UINT32(pic_enable, vpb_sic_state),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
 static void vpb_sic_update(vpb_sic_state *s)
 {
     uint32_t flags;
@@ -117,33 +131,34 @@ static void vpb_sic_write(void *opaque, target_phys_addr_t offset,
     vpb_sic_update(s);
 }
 
-static CPUReadMemoryFunc *vpb_sic_readfn[] = {
+static CPUReadMemoryFunc * const vpb_sic_readfn[] = {
    vpb_sic_read,
    vpb_sic_read,
    vpb_sic_read
 };
 
-static CPUWriteMemoryFunc *vpb_sic_writefn[] = {
+static CPUWriteMemoryFunc * const vpb_sic_writefn[] = {
    vpb_sic_write,
    vpb_sic_write,
    vpb_sic_write
 };
 
-static void vpb_sic_init(SysBusDevice *dev)
+static int vpb_sic_init(SysBusDevice *dev)
 {
     vpb_sic_state *s = FROM_SYSBUS(vpb_sic_state, dev);
     int iomemtype;
     int i;
 
-    qdev_init_irq_sink(&dev->qdev, vpb_sic_set_irq, 32);
+    qdev_init_gpio_in(&dev->qdev, vpb_sic_set_irq, 32);
     for (i = 0; i < 32; i++) {
         sysbus_init_irq(dev, &s->parent[i]);
     }
     s->irq = 31;
-    iomemtype = cpu_register_io_memory(0, vpb_sic_readfn,
-                                       vpb_sic_writefn, s);
+    iomemtype = cpu_register_io_memory(vpb_sic_readfn,
+                                       vpb_sic_writefn, s,
+                                       DEVICE_NATIVE_ENDIAN);
     sysbus_init_mmio(dev, 0x1000, iomemtype);
-    /* ??? Save/restore.  */
+    return 0;
 }
 
 /* Board init.  */
@@ -178,42 +193,45 @@ static void versatile_init(ram_addr_t ram_size,
         fprintf(stderr, "Unable to find CPU definition\n");
         exit(1);
     }
-    ram_offset = qemu_ram_alloc(ram_size);
+    ram_offset = qemu_ram_alloc(NULL, "versatile.ram", ram_size);
     /* ??? RAM should repeat to fill physical memory space.  */
     /* SDRAM at address zero.  */
     cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
 
-    arm_sysctl_init(0x10000000, 0x41007004);
+    arm_sysctl_init(0x10000000, 0x41007004, 0x02000000);
     cpu_pic = arm_pic_init_cpu(env);
     dev = sysbus_create_varargs("pl190", 0x10140000,
                                 cpu_pic[0], cpu_pic[1], NULL);
     for (n = 0; n < 32; n++) {
-        pic[n] = qdev_get_irq_sink(dev, n);
+        pic[n] = qdev_get_gpio_in(dev, n);
     }
     dev = sysbus_create_simple("versatilepb_sic", 0x10003000, NULL);
     for (n = 0; n < 32; n++) {
         sysbus_connect_irq(sysbus_from_qdev(dev), n, pic[n]);
-        sic[n] = qdev_get_irq_sink(dev, n);
+        sic[n] = qdev_get_gpio_in(dev, n);
     }
 
     sysbus_create_simple("pl050_keyboard", 0x10006000, sic[3]);
     sysbus_create_simple("pl050_mouse", 0x10007000, sic[4]);
 
-    pci_bus = pci_vpb_init(sic + 27, 0);
+    dev = sysbus_create_varargs("versatile_pci", 0x40000000,
+                                sic[27], sic[28], sic[29], sic[30], NULL);
+    pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
+
     /* The Versatile PCI bridge does not provide access to PCI IO space,
        so many of the qemu PCI devices are not useable.  */
     for(n = 0; n < nb_nics; n++) {
         nd = &nd_table[n];
 
-        if ((!nd->model && !done_smc) || strcmp(nd->model, "smc91c111") == 0) {
+        if (!done_smc && (!nd->model || strcmp(nd->model, "smc91c111") == 0)) {
             smc91c111_init(nd, 0x10010000, sic[25]);
             done_smc = 1;
         } else {
-            pci_nic_init(pci_bus, nd, -1, "rtl8139");
+            pci_nic_init_nofail(nd, "rtl8139", NULL);
         }
     }
     if (usb_enabled) {
-        usb_ohci_init_pci(pci_bus, 3, -1);
+        usb_ohci_init_pci(pci_bus, -1);
     }
     n = drive_get_max_bus(IF_SCSI);
     while (n >= 0) {
@@ -226,7 +244,7 @@ static void versatile_init(ram_addr_t ram_size,
     sysbus_create_simple("pl011", 0x101f3000, pic[14]);
     sysbus_create_simple("pl011", 0x10009000, sic[6]);
 
-    pl080_init(0x10130000, pic[17], 8);
+    sysbus_create_simple("pl080", 0x10130000, pic[17]);
     sysbus_create_simple("sp804", 0x101e2000, pic[4]);
     sysbus_create_simple("sp804", 0x101e3000, pic[5]);
 
@@ -306,24 +324,39 @@ static void vab_init(ram_addr_t ram_size,
                    initrd_filename, cpu_model, 0x25e);
 }
 
-QEMUMachine versatilepb_machine = {
+static QEMUMachine versatilepb_machine = {
     .name = "versatilepb",
     .desc = "ARM Versatile/PB (ARM926EJ-S)",
     .init = vpb_init,
     .use_scsi = 1,
 };
 
-QEMUMachine versatileab_machine = {
+static QEMUMachine versatileab_machine = {
     .name = "versatileab",
     .desc = "ARM Versatile/AB (ARM926EJ-S)",
     .init = vab_init,
     .use_scsi = 1,
 };
 
+static void versatile_machine_init(void)
+{
+    qemu_register_machine(&versatilepb_machine);
+    qemu_register_machine(&versatileab_machine);
+}
+
+machine_init(versatile_machine_init);
+
+static SysBusDeviceInfo vpb_sic_info = {
+    .init = vpb_sic_init,
+    .qdev.name = "versatilepb_sic",
+    .qdev.size = sizeof(vpb_sic_state),
+    .qdev.vmsd = &vmstate_vpb_sic,
+    .qdev.no_user = 1,
+};
+
 static void versatilepb_register_devices(void)
 {
-    sysbus_register_dev("versatilepb_sic", sizeof(vpb_sic_state),
-                        vpb_sic_init);
+    sysbus_register_withprop(&vpb_sic_info);
 }
 
 device_init(versatilepb_register_devices)