ppc405_uc: use specific endian ld/st_phys

[qemu.git] / hw / vga-isa-mm.c

diff --git a/hw/vga-isa-mm.c b/hw/vga-isa-mm.c
index 5b03a74cc30052e31820e9aa29746c054c815e93..4954bb18be633bc4bb21a14b1bba3e9f498fa146 100644 (file)
--- a/hw/vga-isa-mm.c
+++ b/hw/vga-isa-mm.c
@@ -34,7 +34,7 @@ typedef struct ISAVGAMMState {
 } ISAVGAMMState;
 
 /* Memory mapped interface */
-static uint32_t vga_mm_readb (void *opaque, a_target_phys_addr addr)
+static uint32_t vga_mm_readb (void *opaque, target_phys_addr_t addr)
 {
     ISAVGAMMState *s = opaque;
 
@@ -42,14 +42,14 @@ static uint32_t vga_mm_readb (void *opaque, a_target_phys_addr addr)
 }
 
 static void vga_mm_writeb (void *opaque,
-                           a_target_phys_addr addr, uint32_t value)
+                           target_phys_addr_t addr, uint32_t value)
 {
     ISAVGAMMState *s = opaque;
 
     vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xff);
 }
 
-static uint32_t vga_mm_readw (void *opaque, a_target_phys_addr addr)
+static uint32_t vga_mm_readw (void *opaque, target_phys_addr_t addr)
 {
     ISAVGAMMState *s = opaque;
 
@@ -57,14 +57,14 @@ static uint32_t vga_mm_readw (void *opaque, a_target_phys_addr addr)
 }
 
 static void vga_mm_writew (void *opaque,
-                           a_target_phys_addr addr, uint32_t value)
+                           target_phys_addr_t addr, uint32_t value)
 {
     ISAVGAMMState *s = opaque;
 
     vga_ioport_write(&s->vga, addr >> s->it_shift, value & 0xffff);
 }
 
-static uint32_t vga_mm_readl (void *opaque, a_target_phys_addr addr)
+static uint32_t vga_mm_readl (void *opaque, target_phys_addr_t addr)
 {
     ISAVGAMMState *s = opaque;
 
@@ -72,7 +72,7 @@ static uint32_t vga_mm_readl (void *opaque, a_target_phys_addr addr)
 }
 
 static void vga_mm_writel (void *opaque,
-                           a_target_phys_addr addr, uint32_t value)
+                           target_phys_addr_t addr, uint32_t value)
 {
     ISAVGAMMState *s = opaque;
 
@@ -91,16 +91,18 @@ static CPUWriteMemoryFunc * const vga_mm_write_ctrl[] = {
     &vga_mm_writel,
 };
 
-static void vga_mm_init(ISAVGAMMState *s, a_target_phys_addr vram_base,
-                        a_target_phys_addr ctrl_base, int it_shift)
+static void vga_mm_init(ISAVGAMMState *s, target_phys_addr_t vram_base,
+                        target_phys_addr_t ctrl_base, int it_shift)
 {
     int s_ioport_ctrl, vga_io_memory;
 
     s->it_shift = it_shift;
-    s_ioport_ctrl = cpu_register_io_memory(vga_mm_read_ctrl, vga_mm_write_ctrl, s);
-    vga_io_memory = cpu_register_io_memory(vga_mem_read, vga_mem_write, s);
+    s_ioport_ctrl = cpu_register_io_memory(vga_mm_read_ctrl, vga_mm_write_ctrl, s,
+                                           DEVICE_NATIVE_ENDIAN);
+    vga_io_memory = cpu_register_io_memory(vga_mem_read, vga_mem_write, s,
+                                           DEVICE_NATIVE_ENDIAN);
 
-    register_savevm("vga", 0, 2, vga_common_save, vga_common_load, s);
+    vmstate_register(NULL, 0, &vmstate_vga_common, s);
 
     cpu_register_physical_memory(ctrl_base, 0x100000, s_ioport_ctrl);
     s->vga.bank_offset = 0;
@@ -108,8 +110,8 @@ static void vga_mm_init(ISAVGAMMState *s, a_target_phys_addr vram_base,
     qemu_register_coalesced_mmio(vram_base + 0x000a0000, 0x20000);
 }
 
-int isa_vga_mm_init(a_target_phys_addr vram_base,
-                    a_target_phys_addr ctrl_base, int it_shift)
+int isa_vga_mm_init(target_phys_addr_t vram_base,
+                    target_phys_addr_t ctrl_base, int it_shift)
 {
     ISAVGAMMState *s;
 
@@ -121,10 +123,6 @@ int isa_vga_mm_init(a_target_phys_addr vram_base,
     s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
                                      s->vga.screen_dump, s->vga.text_update, s);
 
-#ifdef CONFIG_BOCHS_VBE
-    /* XXX: use optimized standard vga accesses */
-    cpu_register_physical_memory(VBE_DISPI_LFB_PHYSICAL_ADDRESS,
-                                 VGA_RAM_SIZE, s->vga.vram_offset);
-#endif
+    vga_init_vbe(&s->vga);
     return 0;
 }