* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
+
+#include <hw/hw.h>
+
#define MSR_COLOR_EMULATION 0x01
#define MSR_PAGE_SELECT 0x20
#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
#define VBE_DISPI_INDEX_X_OFFSET 0x8
#define VBE_DISPI_INDEX_Y_OFFSET 0x9
-#define VBE_DISPI_INDEX_NB 0xa
+#define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */
+#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */
#define VBE_DISPI_ID0 0xB0C0
#define VBE_DISPI_ID1 0xB0C1
#define VBE_DISPI_ID2 0xB0C2
#define VBE_DISPI_ID3 0xB0C3
#define VBE_DISPI_ID4 0xB0C4
+#define VBE_DISPI_ID5 0xB0C5
#define VBE_DISPI_DISABLED 0x00
#define VBE_DISPI_ENABLED 0x01
uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
uint32_t vbe_start_addr; \
uint32_t vbe_line_offset; \
- uint32_t vbe_bank_mask;
-
+ uint32_t vbe_bank_mask; \
+ int vbe_mapped;
#else
#define VGA_STATE_COMMON_BOCHS_VBE
typedef struct VGACommonState {
uint8_t *vram_ptr;
- a_ram_addr vram_offset;
- unsigned int vram_size;
+ ram_addr_t vram_offset;
+ uint32_t vram_size;
uint32_t lfb_addr;
uint32_t lfb_end;
uint32_t map_addr;
uint32_t map_end;
uint32_t lfb_vram_mapped; /* whether 0xa0000 is mapped as ram */
- uint32_t bios_offset;
- uint32_t bios_size;
uint32_t latch;
uint8_t sr_index;
uint8_t sr[256];
uint32_t last_width, last_height; /* in chars or pixels */
uint32_t last_scr_width, last_scr_height; /* in pixels */
uint32_t last_depth; /* in bits */
- uint8_t full_update;
uint8_t cursor_start, cursor_end;
uint32_t cursor_offset;
unsigned int (*rgb_to_pixel)(unsigned int r,
vga_retrace_fn retrace;
vga_update_retrace_info_fn update_retrace_info;
union vga_retrace retrace_info;
+ uint8_t is_vbe_vmstate;
} VGACommonState;
static inline int c6_to_8(int v)
void vga_common_init(VGACommonState *s, int vga_ram_size);
void vga_init(VGACommonState *s);
+int vga_init_io(VGACommonState *s);
void vga_common_reset(VGACommonState *s);
void vga_dirty_log_start(VGACommonState *s);
+void vga_dirty_log_stop(VGACommonState *s);
+void vga_dirty_log_restart(VGACommonState *s);
-void vga_common_save(QEMUFile *f, void *opaque);
-int vga_common_load(QEMUFile *f, void *opaque, int version_id);
+extern const VMStateDescription vmstate_vga_common;
uint32_t vga_ioport_read(void *opaque, uint32_t addr);
void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
-uint32_t vga_mem_readb(void *opaque, a_target_phys_addr addr);
-void vga_mem_writeb(void *opaque, a_target_phys_addr addr, uint32_t val);
+uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
+void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
int ppm_save(const char *filename, struct DisplaySurface *ds);
unsigned int color_xor);
int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
+void vga_init_vbe(VGACommonState *s);
extern const uint8_t sr_mask[8];
extern const uint8_t gr_mask[16];
#define VGA_RAM_SIZE (8192 * 1024)
+#define VGABIOS_FILENAME "vgabios.bin"
+#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
extern CPUReadMemoryFunc * const vga_mem_read[3];
extern CPUWriteMemoryFunc * const vga_mem_write[3];