#include "sysbus.h"
#include "hw.h"
-#include "pc.h"
+#include "serial.h"
#include "net.h"
#include "flash.h"
#include "sysemu.h"
#include "loader.h"
#include "elf.h"
#include "qemu-log.h"
+#include "exec-memory.h"
#include "ppc.h"
#include "ppc4xx.h"
-#include "ppc440.h"
#include "ppc405.h"
#include "blockdev.h"
} boot_info;
/* Create reset TLB entries for BookE, spanning the 32bit addr space. */
-static void mmubooke_create_initial_mapping(CPUState *env,
+static void mmubooke_create_initial_mapping(CPUPPCState *env,
target_ulong va,
- target_phys_addr_t pa)
+ hwaddr pa)
{
- ppcemb_tlb_t *tlb = &env->tlb[0].tlbe;
+ ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
tlb->attr = 0;
tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
tlb->RPN = pa & TARGET_PAGE_MASK;
tlb->PID = 0;
- tlb = &env->tlb[1].tlbe;
+ tlb = &env->tlb.tlbe[1];
tlb->attr = 0;
tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
tlb->size = 1 << 31; /* up to 0xffffffff */
tlb->PID = 0;
}
-static CPUState *ppc440_init_xilinx(ram_addr_t *ram_size,
- int do_init,
- const char *cpu_model,
- clk_setup_t *cpu_clk, clk_setup_t *tb_clk,
- uint32_t sysclk)
+static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
+ int do_init,
+ const char *cpu_model,
+ uint32_t sysclk)
{
- CPUState *env;
- qemu_irq *pic;
+ PowerPCCPU *cpu;
+ CPUPPCState *env;
qemu_irq *irqs;
- env = cpu_init(cpu_model);
- if (!env) {
+ cpu = cpu_ppc_init(cpu_model);
+ if (cpu == NULL) {
fprintf(stderr, "Unable to initialize CPU!\n");
exit(1);
}
+ env = &cpu->env;
- cpu_clk->cb = NULL; /* We don't care about CPU clock frequency changes */
- cpu_clk->opaque = env;
- /* Set time-base frequency to sysclk */
- tb_clk->cb = ppc_emb_timers_init(env, sysclk, PPC_INTERRUPT_DECR);
- tb_clk->opaque = env;
+ ppc_booke_timers_init(env, sysclk, 0/* no flags */);
ppc_dcr_init(env, NULL, NULL);
/* interrupt controller */
- irqs = qemu_mallocz(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
+ irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
- pic = ppcuic_init(env, irqs, 0x0C0, 0, 1);
- return env;
+ ppcuic_init(env, irqs, 0x0C0, 0, 1);
+ return cpu;
}
static void main_cpu_reset(void *opaque)
{
- CPUState *env = opaque;
+ PowerPCCPU *cpu = opaque;
+ CPUPPCState *env = &cpu->env;
struct boot_info *bi = env->load_info;
- cpu_reset(env);
+ cpu_reset(CPU(cpu));
/* Linux Kernel Parameters (passing device tree):
* r3: pointer to the fdt
* r4: 0
}
#define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb"
-static int xilinx_load_device_tree(target_phys_addr_t addr,
+static int xilinx_load_device_tree(hwaddr addr,
uint32_t ramsize,
- target_phys_addr_t initrd_base,
- target_phys_addr_t initrd_size,
+ hwaddr initrd_base,
+ hwaddr initrd_size,
const char *kernel_cmdline)
{
char *path;
path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
if (path) {
fdt = load_device_tree(path, &fdt_size);
- qemu_free(path);
+ g_free(path);
}
if (!fdt) {
return 0;
path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
if (path) {
fdt_size = load_image_targphys(path, addr, 0x10000);
- qemu_free(path);
+ g_free(path);
}
}
return fdt_size;
}
-static void virtex_init(ram_addr_t ram_size,
- const char *boot_device,
- const char *kernel_filename,
- const char *kernel_cmdline,
- const char *initrd_filename, const char *cpu_model)
+static void virtex_init(QEMUMachineInitArgs *args)
{
+ ram_addr_t ram_size = args->ram_size;
+ const char *cpu_model = args->cpu_model;
+ const char *kernel_filename = args->kernel_filename;
+ const char *kernel_cmdline = args->kernel_cmdline;
+ MemoryRegion *address_space_mem = get_system_memory();
DeviceState *dev;
- CPUState *env;
- target_phys_addr_t ram_base = 0;
+ PowerPCCPU *cpu;
+ CPUPPCState *env;
+ hwaddr ram_base = 0;
DriveInfo *dinfo;
- ram_addr_t phys_ram;
- ram_addr_t phys_flash;
+ MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
qemu_irq irq[32], *cpu_irq;
- clk_setup_t clk_setup[7];
int kernel_size;
int i;
cpu_model = "440-Xilinx";
}
- memset(clk_setup, 0, sizeof(clk_setup));
- env = ppc440_init_xilinx(&ram_size, 1, cpu_model, &clk_setup[0],
- &clk_setup[1], 400000000);
- qemu_register_reset(main_cpu_reset, env);
+ cpu = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000);
+ env = &cpu->env;
+ qemu_register_reset(main_cpu_reset, cpu);
- phys_ram = qemu_ram_alloc(NULL, "ram", ram_size);
- cpu_register_physical_memory(ram_base, ram_size, phys_ram | IO_MEM_RAM);
+ memory_region_init_ram(phys_ram, "ram", ram_size);
+ vmstate_register_ram_global(phys_ram);
+ memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
- phys_flash = qemu_ram_alloc(NULL, "virtex.flash", FLASH_SIZE);
dinfo = drive_get(IF_PFLASH, 0, 0);
- pflash_cfi01_register(0xfc000000, phys_flash,
+ pflash_cfi01_register(0xfc000000, NULL, "virtex.flash", FLASH_SIZE,
dinfo ? dinfo->bdrv : NULL, (64 * 1024),
FLASH_SIZE >> 16,
1, 0x89, 0x18, 0x0000, 0x0, 1);
irq[i] = qdev_get_gpio_in(dev, i);
}
- serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0], 1, 0);
+ serial_mm_init(address_space_mem, 0x83e01003ULL, 2, irq[9], 115200,
+ serial_hds[0], DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 62 Mhz. */
- xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);
+ xilinx_timer_create(0x83c00000, irq[3], 0, 62 * 1000000);
if (kernel_filename) {
uint64_t entry, low, high;
- uint32_t base32;
- target_phys_addr_t boot_offset;
+ hwaddr boot_offset;
/* Boots a kernel elf binary. */
kernel_size = load_elf(kernel_filename, NULL, NULL,
&entry, &low, &high, 1, ELF_MACHINE, 0);
- base32 = entry;
boot_info.bootstrap_pc = entry & 0x00ffffff;
if (kernel_size < 0) {
projects / qemu.git / blobdiff