target-mips: Enable access to required RDHWR hardware registers

[qemu.git] / ia64-dis.c

diff --git a/ia64-dis.c b/ia64-dis.c
index 2886df361443c920a99fb7c80937302add8acbd3..2a103e6b5cbfa6a71381ce39ab2f79449a05391b 100644 (file)
--- a/ia64-dis.c
+++ b/ia64-dis.c
@@ -781,6 +781,9 @@ ext_inc3 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
   return 0;
 }
 
+/* glib.h defines ABS so we must undefine it to avoid a clash */
+#undef ABS
+
 #define CST    IA64_OPND_CLASS_CST
 #define REG    IA64_OPND_CLASS_REG
 #define IND    IA64_OPND_CLASS_IND