int i;
for(i = start; i < start + length; i++) {
- ioport_read_table[0][i] = default_ioport_readb;
- ioport_read_table[1][i] = default_ioport_readw;
- ioport_read_table[2][i] = default_ioport_readl;
+ ioport_read_table[0][i] = NULL;
+ ioport_read_table[1][i] = NULL;
+ ioport_read_table[2][i] = NULL;
- ioport_write_table[0][i] = default_ioport_writeb;
- ioport_write_table[1][i] = default_ioport_writew;
- ioport_write_table[2][i] = default_ioport_writel;
+ ioport_write_table[0][i] = NULL;
+ ioport_write_table[1][i] = NULL;
+ ioport_write_table[2][i] = NULL;
ioport_opaque[i] = NULL;
}
}
+bool isa_is_ioport_assigned(pio_addr_t start)
+{
+ return (ioport_read_table[0][start] || ioport_write_table[0][start] ||
+ ioport_read_table[1][start] || ioport_write_table[1][start] ||
+ ioport_read_table[2][start] || ioport_write_table[2][start]);
+}
+
/***********************************************************/
void cpu_outb(pio_addr_t addr, uint8_t val)