#endif
#ifdef TARGET_ABI_MIPSN32
-typedef target_ulong target_elf_greg_t;
-#define tswapreg(ptr) tswapl(ptr)
+typedef abi_ullong target_elf_greg_t;
+#define tswapreg(ptr) tswap64(ptr)
#else
typedef abi_ulong target_elf_greg_t;
#define tswapreg(ptr) tswapal(ptr)
typedef abi_ushort target_uid_t;
typedef abi_ushort target_gid_t;
#else
-typedef target_uint target_uid_t;
-typedef target_uint target_gid_t;
+typedef abi_uint target_uid_t;
+typedef abi_uint target_gid_t;
#endif
-typedef target_int target_pid_t;
+typedef abi_int target_pid_t;
#ifdef TARGET_I386
static const char *get_elf_platform(void)
{
static char elf_platform[] = "i386";
- int family = (thread_env->cpuid_version >> 8) & 0xff;
+ int family = object_property_get_int(OBJECT(thread_cpu), "family", NULL);
if (family > 6)
family = 6;
if (family >= 3)
static uint32_t get_elf_hwcap(void)
{
- return thread_env->cpuid_features;
+ X86CPU *cpu = X86_CPU(thread_cpu);
+
+ return cpu->env.features[FEAT_1_EDX];
}
#ifdef TARGET_X86_64
static uint32_t get_elf_hwcap(void)
{
- CPUARMState *e = thread_env;
+ ARMCPU *cpu = ARM_CPU(thread_cpu);
uint32_t hwcaps = 0;
hwcaps |= ARM_HWCAP_ARM_SWP;
/* probe for the extra features */
#define GET_FEATURE(feat, hwcap) \
- do {if (arm_feature(e, feat)) { hwcaps |= hwcap; } } while (0)
+ do { if (arm_feature(&cpu->env, feat)) { hwcaps |= hwcap; } } while (0)
GET_FEATURE(ARM_FEATURE_VFP, ARM_HWCAP_ARM_VFP);
GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
static uint32_t get_elf_hwcap(void)
{
- CPUPPCState *e = thread_env;
+ PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
uint32_t features = 0;
/* We don't have to be terribly complete here; the high points are
Altivec/FP/SPE support. Anything else is just a bonus. */
#define GET_FEATURE(flag, feature) \
- do {if (e->insns_flags & flag) features |= feature; } while(0)
+ do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
GET_FEATURE(PPC_64B, QEMU_PPC_FEATURE_64);
GET_FEATURE(PPC_FLOAT, QEMU_PPC_FEATURE_HAS_FPU);
GET_FEATURE(PPC_ALTIVEC, QEMU_PPC_FEATURE_HAS_ALTIVEC);
};
struct target_elf_siginfo {
- target_int si_signo; /* signal number */
- target_int si_code; /* extra code */
- target_int si_errno; /* errno */
+ abi_int si_signo; /* signal number */
+ abi_int si_code; /* extra code */
+ abi_int si_errno; /* errno */
};
struct target_elf_prstatus {
struct target_timeval pr_cutime; /* XXX Cumulative user time */
struct target_timeval pr_cstime; /* XXX Cumulative system time */
target_elf_gregset_t pr_reg; /* GP registers */
- target_int pr_fpvalid; /* XXX */
+ abi_int pr_fpvalid; /* XXX */
};
#define ELF_PRARGSZ (80) /* Number of chars for args */
long signr, const CPUArchState *env)
{
#define NUMNOTES 3
- CPUArchState *cpu = NULL;
+ CPUState *cpu = NULL;
TaskState *ts = (TaskState *)env->opaque;
int i;
/* read and fill status of all threads */
cpu_list_lock();
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
- if (cpu == thread_env)
+ if (cpu == thread_cpu) {
continue;
- fill_thread_info(info, cpu);
+ }
+ fill_thread_info(info, (CPUArchState *)cpu->env_ptr);
}
cpu_list_unlock();