target-cris: Move TCG initialization to CRISCPU initfn

[qemu.git] / target-cris / helper.c

diff --git a/target-cris/helper.c b/target-cris/helper.c
index 8680f436a0b5ced34f27460617ba65ce54d0df6a..6e75e9819e7eac3b38df3f1559ab68aa5d415528 100644 (file)
--- a/target-cris/helper.c
+++ b/target-cris/helper.c
@@ -20,7 +20,7 @@
 
 #include "cpu.h"
 #include "mmu.h"
-#include "host-utils.h"
+#include "qemu/host-utils.h"
 
 
 //#define CRIS_HELPER_DEBUG
@@ -28,7 +28,7 @@
 
 #ifdef CRIS_HELPER_DEBUG
 #define D(x) x
-#define D_LOG(...) qemu_log(__VA__ARGS__)
+#define D_LOG(...) qemu_log(__VA_ARGS__)
 #else
 #define D(x)
 #define D_LOG(...) do { } while (0)
@@ -121,14 +121,14 @@ static void do_interruptv10(CPUCRISState *env)
                        /* These exceptions are genereated by the core itself.
                           ERP should point to the insn following the brk.  */
                        ex_vec = env->trap_vector;
-                       env->pregs[PR_ERP] = env->pc;
+                       env->pregs[PRV10_BRP] = env->pc;
                        break;
 
                case EXCP_NMI:
                        /* NMI is hardwired to vector zero.  */
                        ex_vec = 0;
-                       env->pregs[PR_CCS] &= ~M_FLAG;
-                       env->pregs[PR_NRP] = env->pc;
+                       env->pregs[PR_CCS] &= ~M_FLAG_V10;
+                       env->pregs[PRV10_BRP] = env->pc;
                        break;
 
                case EXCP_BUSFAULT:
@@ -151,7 +151,7 @@ static void do_interruptv10(CPUCRISState *env)
        }
 
        /* Now that we are in kernel mode, load the handlers address.  */
-       env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4);
+        env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4);
        env->locked_irq = 1;
        env->pregs[PR_CCS] |= F_FLAG_V10; /* set F.  */
 
@@ -185,7 +185,7 @@ void do_interrupt(CPUCRISState *env)
                case EXCP_NMI:
                        /* NMI is hardwired to vector zero.  */
                        ex_vec = 0;
-                       env->pregs[PR_CCS] &= ~M_FLAG;
+                       env->pregs[PR_CCS] &= ~M_FLAG_V32;
                        env->pregs[PR_NRP] = env->pc;
                        break;
 
@@ -233,7 +233,7 @@ void do_interrupt(CPUCRISState *env)
        /* Now that we are in kernel mode, load the handlers address.
           This load may not fault, real hw leaves that behaviour as
           undefined.  */
-       env->pc = ldl_code(env->pregs[PR_EBP] + ex_vec * 4);
+        env->pc = cpu_ldl_code(env, env->pregs[PR_EBP] + ex_vec * 4);
 
        /* Clear the excption_index to avoid spurios hw_aborts for recursive
           bus faults.  */
@@ -246,7 +246,7 @@ void do_interrupt(CPUCRISState *env)
                   env->pregs[PR_ERP]);
 }
 
-target_phys_addr_t cpu_get_phys_page_debug(CPUCRISState * env, target_ulong addr)
+hwaddr cpu_get_phys_page_debug(CPUCRISState * env, target_ulong addr)
 {
        uint32_t phy = addr;
        struct cris_mmu_result res;